Schematic text — searchable without opening the PDF
A PDF inside a frame is invisible to a crawler and often unsearchable in the browser. Here is the schematic’s text layer as plain text, so you can use Ctrl+F on this page to find a rail name, a component reference or a page heading.
5 4 3 2 1 D %$ &'' ( )) ($ * WHL ULT U4+2 GPU VRAM D DDR N17S-G0/N17S-G2 GDDR5 x32*2pcs ! " #$ P23 DDR4-Memory Down DDR4-SoDIMM PCI-e CH. B P18 CH. A P17 27MHz P19-22 * * *( * SATA SATA - HDD Re-Driver SATA - ODD SSD DDI HDMI SATA/PCIe-SSD P32 SN75LVCP601RTJR (Reserve) HDMI 1.4 4K2K P27 P32 P32 P33 PTN3366BS (Reserve) P27 ! " +# ( PCI-e !", !"' )) )( ) USB 3.0 eDP LCD Panel UB3/MB Port2 UB3/MB Port1 LAN POA M/B Type-C MUX eDP 2 Lane for 4K2K P25 P24 P24 25MHz RTL8111HSH-CG (Reserve) Wifi / BT P29 PI2EQX632EXUBE P28 P31 P29 P33 - ($ (( () ( Battery RJ45 (' (, & (+ USB 2.0 P13 C P28 C Processor : Daul Core 32.768kHz CCD Touch Screen CR D/B USB 2.0 Power : 15 (Watt) MCP 1356pins P25 P25 (Reserve) P35 P35 Size : 40 X 24 (mm) 24MHz 24MHz DMIC LED D/B Head Phone U42 Reserve P25 P35 P35 Integrated PCH Daughter Board LPC Interface Audio Codec HDA TPM FAN Speaker ALC255-CG NPCT750AAAYX P30 P26 Co-Lay 2566 P26 (Reserve) P31 Embedded Controller Keyboard BLP30 I2C Touch Pad P31 IT8987E/CX Keyboard P30 G-sensor P31 Hall Sensor P35 B SPI SPI ROM P10 P34 B BOM option IV@ : UMA Power solution EV@ : DIS TPC@ : Type-C function TPC_N@ :No Type-C function ! & * !. TSI@ : Touch screen I2C Batery Charger +VCC_CORE +VGPU_CORE TPM@ : Trusted Platform Module PBA@ : Finger Print on touch pad BQ24780SRUYRP37 RT9610CGQW P42 RT8813DGQW P46 KBL@ : Keyboard back light GS@ : G-Sensor function +3VPCU/+5VPCU +VCCGT +1.35V_GFX GS_N@ : No G-Sensor function RT6258CGQUF P38 RT9610CGQW P43 G5335QT2U P47 SSD@ : Solid State Disk ODD@ : Optical Disc Drive +3V/+5V +VCCSA +1V8_AON EMC@ : eMMC function JW7110DFNC P38 RT9610CGQW P43 JW7110DFNC P48 RAM@ : On Board Memory SP@ : Power & VGA HDD_R@ : Hard Disc Redriver +1V_S5 +1.8V_S5 +1.03_GFX HDD_N@ : NO Hard Disc Redriver CNV@ : Intel WIFI G5335QT2U P39 JW5213DFND P44 G9336ADJTP1U P48 CNV_N@ :NO Intel WIFI HDMI_R@ : HDMI Redirver +1.2VSUS +1.5V Thermal protection A HDMI_N@ : No HDMI Redirver RT8231BGQW JW5222RSOTBP44 TMP708AIDBVR P44 A Debug@ : for Debug Card G9661MF11U P40 255@ : Codec 255 256@ : Codec 256 FOR15_17@ : Panel 15 or 17 inch FOR14@ : Panel 14 inch Quanta Computer Inc. PROJECT : ZAW Size Document Number Rev Block Diagram 1A Date: Wednesday, February 27, 2019 Sheet 1 of 48 5 4 3 2 1 5 4 3 2 1 +3V 4,10,11,12,13,14,15,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,43,44,45,46 IN_D2# U1A EDP_TXN_0 AG4 INT_EDP_TXN0 INT_EDP_TXN0 25 Reserve EDP_HPD opposites circuit! ( +VCCST 4,5,6 IN_D2 AL5 EDP_TXP_0 AG3 INT_EDP_TXP0 INT_EDP_TXP0 25 IN_D1# AL6 DDI1_TXN_0 EDP_TXN_1 AG2 INT_EDP_TXN1 INT_EDP_TXN1 25 +3V D 27 IN_D2# IN_D1 AJ5 DDI1_TXP_0 EDP_TXP_1 AG1 INT_EDP_TXP1 INT_EDP_TXP1 25 27 IN_D2 IN_D0# AJ6 DDI1_TXN_1 EDP_TXN_2 AJ4 INT_EDP_TXN2 INT_EDP_TXN2 25 R10880 27 IN_D1# IN_D0 AF6 DDI1_TXP_1 EDP_TXP_2 AJ3 INT_EDP_TXP2 INT_EDP_TXP2 25 *10K_1%_2 27 IN_D1 IN_CLK# AF5 DDI1_TXN_2 EDP_TXN_3 AJ2 INT_EDP_TXN3 INT_EDP_TXN3 25 27 IN_D0# IN_CLK AE5 DDI1_TXP_2 EDP_TXP_3 AJ1 INT_EDP_TXP3 INT_EDP_TXP3 25 ULT_EDP_HPD 27 IN_D0 AE6 DDI1_TXN_3 R1 27 IN_CLK# INT_EDP_AUXN 25 100K_5%_4 27 IN_CLK DDI1_TXP_3 INT_EDP_AUXP 25 D AC4 EDP_AUX AH4 INT_EDP_AUXN checklist REV 2.0 : PD 20K AC3 DDI2_TXN_0 EDP_AUX_P AH3 INT_EDP_AUXP AC1 DDI2_TXP_0 AC2 DDI2_TXN_1 DISP_UTILS AM7 AE4 DDI2_TXP_1 AE3 DDI2_TXN_2 DDI1_AUX AC7 AE1 DDI2_TXP_2 DDI1_AUX_P AC6 AE2 DDI2_TXN_3 AD4 DDI2_AUX AD3 DDI2_TXP_3 DDI2_AUX_P AG7 AG6 +3V DDI3_AUX DDI3_AUX_P SIO_EXT_SCI# R25436 GPP_E13/DDPB_HPD0/DISP_MISC0 CN6 HDMI_HPD_CON HDMI_HPD_CON 27 20K_1%_2 GPP_E14/DDPC_HPD1/DISP_MISC1 CM6 GPP_E15/DPPD_HPD2/DISP_MISC2 GPP_E16/DPPE_HPD3/DISP_MISC3 CP7 PCH_TypeC_UPFb# PCH_TypeC_UPFb# 29 *Short_0402SIO_EXT_SCI# SIO_EXT_SCI# 34 GPP_E17/EDP_HPD/DISP_MISC4 CP6 R25448 25 PCH_DPST_PWM CM7 ULT_EDP_HPD ULT_EDP_HPD PCH_LVDS_BLON EDP_BKLTEN !" #$%"& '( #$)*(& (!) '!"" EDP_VDDEN CK11 PCH_LVDS_BLON PCH_LVDS_BLON 25 ! & )$%*(& + *# *,- .!" /-(&! .( 0 1 /$#/ EDP_BKLTCTL CG11 PCH_DISP_ON PCH_DISP_ON 25 CH11 PCH_DPST_PWM PCH_DPST_PWM 25 +VCCIO EDP_RCOMP AM6 DISP_RCOMP R2 24.9_1%_4 CC8 GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_W AKE# 27 SDVO_CLK CC9 GPP_E19/DPPB_CTRLDATA SPEC:0.033u C1 C2 27 SDVO_DATA 0.033u/16V_4 *0.033u/16V_4 C CH4 SCH:0.47u C CH3 GPP_E20/DPPC_CTRLCLK GPP_E21/DPPC_CTRLDATA +3V_S5 CP4 GPP_E22/DPPD_CTRLCLK close SOC 20K_1%_2 CN4 GPP_E23/DPPD_CTRLDATA Type C change CR26 GPP_H16/DDPF_CTRLCLK PCH_TypeC_UPFb# R202 CP26 GPP_H17/DDPF_CTRLDATA JTAG_TDI_PCH R3 *Short_020X1DP_TDI_CPU *Short_020X1DP_TDO_CPU JTAG_TDO_PCH R4 *Short_020X1DP_TMS_CPU *Short_020P1ROC_TRST# WHL_U_43E_IL_IP_DDR4 JTAG_TMS_PCH R5 *Short_020X1DP_TCK0 1 of 20 XDP_TRST#_CPU R6 JTAGX_PCH R7 U1D DCI Debug XDP_TCK0 16 +VCCST CATERR# AA4 CATERR# T6 XDP_TCK0 PECI PROC_TCK U6 JTAG_TCK_PCH 16 34,36,40 H_PROCHOT# R9 499_1%_324 EC_PECI EC_PECI AR1 PROCHOT# PROC_TDI Y5 XDP_TDI_CPU Y4 THRMTRIP# PROC_TDO T5 XDP_TDO_CPU XDP_PRDY#_CPU 16 THERMTRIP# R25479 PROCHOT# PROC_TMS AB6 XDP_TMS_CPU XDP_PREQ#_CPU 16 *Short_040T2HERMTRIP#_CPU BJ1 BPM#_0 PROC_TRST# PROC_TRST# BPM#_1 R10 49.9_1%_2 CATERR# U1 BPM#_2 W6 JTAG_TCK_PCH +VCCST U2 BPM#_3 PCH_TCK U5 JTAG_TDI_PCH C6618 16 XDP_BPM0 U3 PCH_TDI W 5 JTAG_TDO_PCH 0.1u/6.3V_2 16 XDP_BPM1 U4 PCH_TDO P5 JTAG_TMS_PCH PCH_TMS Y6 XDP_TRST#_CPU R11 *1K_5%_2JTAGX_PCH R12 51_5%_2 JTAG_TMS_PCH PCH_TRST# P6 JTAGX_PCH PCH_JTAGX B B R13 51_5%_2 JTAG_TDI_PCH CE9 W2 R14 100_1%J_T2AG_TDO_PCH CN3 GPP_E3/CPU_GP0PROC_PREQ# W 1 CB34 GPP_E7/CPU_GP1PROC_PRDY# PLACE NEAR CPU R17 *51_5%_2 JTAG_TCK_PCH +VCCST 14 DGPU_PW_CTRL# CC35 GPP_B3/CPU_GP2 GPP_B4/CPU_GP3 XDP_TMS_CPU R15 *51_5%_2 51_5%_2 Close to Chipset R16 49.9_1%_2 PROC_POPIRCOMP BP27 PROC_POPIRCOMP XDP_TDI_CPU R19 100_1%_2 R18 49.9_1%_2 PCH_OPI_RCOMP BW 25 PCH_OPIRCOMP R20 49.9_1%_2 EDRAM_OPIO_RCOMP OPCE_RCOMP XDP_TDO_CPU R22 R21 49.9_1%_2 EOPIO_RCOMP L5 OPC_RCOMP N5 THERMTRIP# (50ohm) +VCCST 4 of 20 Trace Length: 1.1~12 inches WHL_U_43E_IL_IP_DDR4 3 +VCCIO 1K_5%_2 4,40 IMVP_PWRGD 2 Q85 H_PROCHOT# R23 R825 DMG301NU-7 51_5%_2 *100K_1%_4 XDP_TCK0 R24 *51_5%_2 R821 R822 1K/F_4 1 1K/F_4 XDP_TRST#_CPU R25 A 2 Q86 A 34,37,43 SYS_SHDN# 3 1 THERMTRIP# Quanta Computer Inc. METR3904-G PROJECT : ZAW Size Document Number Rev KBL-U 1/15 eDP/DDI/MISC 1A Date: Wednesday, February 27, 2019 Sheet 2 of 48 5 4 3 2 1 5 4 3 2 1 17 M_A_DQSN[7:0] / +3V_DEEP_SUS 4,10,11,13,14,15 WHL ULT Processor (DDR4) "0 ) 17 M_A_DQSP[7:0] /* 17 M_A_DQ[63:0] * "0 18 M_B_DQ[63:0] D Interleave / Non-Interleave Interleave / Non-Interleave C U1B B M_A_DQ0 A26 U1C M_A_DQ1 D26 DDR0_DQ_0/DDR0_DQ_0 M_B_DQ0 J22 M_A_DQ2 D28 DDR0_DQ_1/DDR0_DQ_1 V32 M_A_CLKN0 17 M_B_DQ1 H25 DDR1_DQ_0/DDR0_DQ_16 DDR1_CKN_0/DDR1_CKN_0 AF28 M_B_CLKN0 18 D M_A_DQ3 C28 DDR0_DQ_2/DDR0_DQ_2 DDR0_CKN_0/DDR0_CKN_0 V31 M_A_CLKP0 17 M_B_DQ2 G22 DDR1_DQ_1/DDR0_DQ_17 DDR1_CKP_0/DDR1_CKP_0 AF29 M_B_CLKP0 18 M_A_DQ4 B26 DDR0_DQ_3/DDR0_DQ_3 DDR0_CKP_0/DDR0_CKP_0 T32 M_A_CLKN1 17 M_B_DQ3 H22 DDR1_DQ_2/DDR0_DQ_18 DDR1_CKN_1/DDR1_CKN_1 AE28 DDR0_CKN_1/DDR0_CKN_1 T31 M_A_CLKP1 17 M_B_DQ4 F25 DDR1_DQ_3/DDR0_DQ_19 DDR1_CKP_1/DDR1_CKP_1 AE29 DDR0_CKP_1/DDR0_CKP_1 M_A_DQ5 C26 DDR0_DQ_4/DDR0_DQ_4 U36 M_A_CKE0 17 M_B_DQ5 J25 DDR1_DQ_4/DDR0_DQ_20 T28 M_B_CKE0 18 M_A_DQ6 B28 DDR0_DQ_5/DDR0_DQ_5 DDR0_CKE_0/DDR0_CKE_0 U37 M_A_CKE1 17 M_B_DQ6 G25 DDR1_DQ_5/DDR0_DQ_21 DDR1_CKE_0/DDR1_CKE_0 T29 M_A_DQ7 A28 DDR0_DQ_6/DDR0_DQ_6 DDR0_CKE_1/DDR0_CKE_1 U34 M_B_DQ7 F22 DDR1_DQ_6/DDR0_DQ_22 DDR1_CKE_1/DDR1_CKE_1 V28 M_A_DQ8 B30 DDR0_DQ_7/DDR0_DQ_7 M_B_DQ8 D22 DDR1_DQ_7/DDR0_DQ_23 DDR0_CKE_2/NC U35 DDR1_CKE_2/NC V29 M_A_DQ9 D30 DDR0_DQ_8/DDR0_DQ_8 DDR0_CKE_3/NC M_B_DQ9 C22 DDR1_DQ_8/DDR0_DQ_24 DDR1_CKE_3/NC M_A_DQ10 B33 DDR0_DQ_9/DDR0_DQ_9 AE32 M_B_DQ10 C24 DDR1_DQ_9/DDR0_DQ_25 AL37 AF32 M_B_DQ11 D24 DDR1_DQ_10/DDR0_DQ_26 DDR1_CS#_0/DDR1_CS#_0 AL35 M_A_DQ11 D32 DDR0_DQ_10/DDR0_DQ_10 DDR0_CS#_0/DDR0_CS#_0 AE31 M_A_CS#0 17 M_B_CS#0 18 M_A_DQ12 A30 AF31 M_A_CS#1 17 DDR0_DQ_11/DDR0_DQ_11 DDR0_CS#_1/DDR0_CS#_1 M_A_DIM0_ODT0 17 M_B_DQ12 A22 DDR1_DQ_11/DDR0_DQ_27 DDR1_CS#_1/DDR1_CS#_1 AL36 M_A_DQ13 C30 M_A_DIM0_ODT1 17 M_B_DQ13 B22 DDR1_DQ_12/DDR0_DQ_28 DDR1_ODT_0/DDR1_ODT_0 AL34 M_A_DQ14 B32 DDR0_DQ_12/DDR0_DQ_12 DDR0_ODT_0/DDR0_ODT_0 M_A_A0 17 M_B_DIM0_ODT0 18 M_A_DQ15 C32 M_A_A1 17 DDR0_DQ_13/DDR0_DQ_13 NC/DDR0_ODT_1 M_A_A2 17 M_B_DQ14 A24 DDR1_DQ_13/DDR0_DQ_29 NC/DDR1_ODT_1 AG36 M_B_A0 M_A_DQ16 H37 M_A_A3 17 M_B_DQ15 B24 DDR1_DQ_14/DDR0_DQ_30 DDR1_CAB_9/DDR1_MA_0 AG35 M_B_A1 M_A_DQ17 H34 DDR0_DQ_14/DDR0_DQ_14 AC37 M_A_A0 M_A_A4 17 M_B_DQ16 G31 DDR1_DQ_15/DDR0_DQ_31 DDR1_CAB_8/DDR1_MA_1 M_B_A0 18 AC36 M_A_A1 M_A_A5 17 M_B_DQ17 G32 DDR1_DQ_16/DDR0_DQ_48 DDR1_CAB_5/DDR1_MA_2 AF34 M_B_A2 M_B_A1 18 M_A_DQ18 K34 DDR0_DQ_15/DDR0_DQ_15 DDR0_CAB_9/DDR0_MA_0 AC34 M_A_A2 M_A_A6 17 M_B_DQ18 H29 DDR1_DQ_17/DDR0_DQ_49 AG37 M_B_A3 M_B_A2 18 M_A_DQ19 K35 AC35 M_A_A3 M_A_A7 17 M_B_DQ19 H28 DDR1_DQ_18/DDR0_DQ_50 NC/DDR1_MA_3 M_B_A3 18 M_A_DQ20 H36 DDR0_DQ_16/DDR0_DQ_32 DDR0_CAB_8/DDR0_MA_1 AA35 M_A_A4 M_A_A8 17 M_B_DQ20 G28 DDR1_DQ_19/DDR0_DQ_51 NC/DDR1_MA_4 AE35 M_B_A4 M_B_A4 18 AB35 M_A_A5 M_A_A9 17 M_B_DQ21 G29 DDR1_DQ_20/DDR0_DQ_52 DDR1_CAA_0/DDR1_MA_5 AF35 M_B_A5 M_B_A5 18 M_A_DQ21 H35 DDR0_DQ_17/DDR0_DQ_33 DDR0_CAB_5/DDR0_MA_2 AA37 M_A_A6 M_A_A10 17 M_B_DQ22 H31 DDR1_DQ_21/DDR0_DQ_53 DDR1_CAA_2/DDR1_MA_6 AE37 M_B_A6 M_B_A6 18 M_A_DQ22 K36 AA36 M_A_A7 M_A_A11 17 M_B_DQ23 H32 DDR1_DQ_22/DDR0_DQ_54 DDR1_CAA_4/DDR1_MA_7 M_B_A7 18 DDR0_DQ_18/DDR0_DQ_34 NC/DDR0_MA_3 AB34 M_A_A8 M_A_A12 17 M_B_DQ24 L31 DDR1_DQ_23/DDR0_DQ_55 DDR1_CAA_3/DDR1_MA_8 AC29 M_B_A7 M_B_A8 18 M_A_DQ23 K37 W 36 M_A_A9 M_A_A13 17 M_B_DQ25 L32 DDR1_DQ_24/DDR0_DQ_56 DDR1_CAA_1/DDR1_MA_9 AE36 M_B_A8 M_B_A9 18 M_A_DQ24 N36 DDR0_DQ_19/DDR0_DQ_35 NC/DDR0_MA_4 Y31 M_A_A10 M_B_DQ26 N29 DDR1_DQ_25/DDR0_DQ_57 DDR1_CAB_7/DDR1_MA_10 M_B_A10 18 M_A_DQ25 N34 W 34 M_A_A11 M_A_WE# 17 M_B_DQ27 N28 DDR1_DQ_26/DDR0_DQ_58 DDR1_CAA_7/DDR1_MA_11 AB29 M_B_A9 M_B_A11 18 DDR0_DQ_20/DDR0_DQ_36 DDR0_CAA_0/DDR0_MA_5 AA34 M_A_A12 M_A_CAS# 17 M_B_DQ28 L28 DDR1_DQ_27/DDR0_DQ_59 DDR1_CAA_6/DDR1_MA_12 AG34 M_B_A10 M_B_A12 18 M_A_DQ26 R37 AC32 M_A_A13 M_A_RAS# 17 DDR1_CAB_0/DDR1_MA_13 AC28 M_B_A11 M_B_A13 18 M_A_DQ27 R34 DDR0_DQ_21/DDR0_DQ_37 DDR0_CAA_2/DDR0_MA_6 M_A_BS#0 17 M_A_BS#1 17 AB28 M_B_A12 M_A_DQ28 N37 DDR0_DQ_22/DDR0_DQ_38 DDR0_CAA_4/DDR0_MA_7 M_A_BG#0 17 AK35 M_B_A13 M_A_DQ29 N35 M_A_ACT# 17 M_A_DQ30 R36 DDR0_DQ_23/DDR0_DQ_39 DDR0_CAA_3/DDR0_MA_8 M_A_BG#1 17 M_A_DQ31 R35 DDR0_DQ_24/DDR0_DQ_40 DDR0_CAA_1/DDR0_MA_9 M_A_ALERT# 17 M_A_DQ32 AN35 M_A_PARITY 17 DDR0_DQ_25/DDR0_DQ_41 DDR0_CAB_7/DDR0_MA_10 M_A_DQ33 AN34 M_A_DQ34 AR35 DDR0_DQ_26/DDR0_DQ_42 DDR0_CAA_7/DDR0_MA_11 M_A_DQ35 AR34 DDR0_DQ_27/DDR0_DQ_43 DDR0_CAA_6/DDR0_MA_12 M_A_DQ36 AN37 M_A_DQ37 AN36 DDR0_DQ_28/DDR0_DQ_44 DDR0_CAB_0/DDR0_MA_13 M_B_DQ29 L29 DDR1_DQ_28/DDR0_DQ_60 AJ35 M_B_DQ30 N31 DDR1_DQ_29/DDR0_DQ_61 AK34 M_A_DQ38 AR36 DDR0_DQ_29/DDR0_DQ_45 AC31 DDR1_DQ_30/DDR0_DQ_62 DDR1_CAB_2/DDR1_MA_14 AJ34 M_B_WE# 18 C M_A_DQ39 AR37 AB32 M_B_DQ31 N32 DDR1_DQ_31/DDR0_DQ_63 DDR1_CAB_1/DDR1_MA_15 M_B_CAS# 18 M_A_DQ40 AU35 DDR0_DQ_30/DDR0_DQ_46 DDR0_CAB_2/DDR0_MA_14 Y32 M_B_DQ32 AJ29 DDR1_CAB_3/DDR1_MA_16 M_B_RAS# 18 M_A_DQ41 AU34 DDR0_DQ_31/DDR0_DQ_47 DDR0_CAB_1/DDR0_MA_15 M_A_DQ42AW 35 DDR0_DQ_32/DDR1_DQ_0 DDR0_CAB_3/DDR0_MA_16 M_B_DQ33 AJ30 DDR1_DQ_32/DDR1_DQ_16 AJ37 M_A_DQ43AW 34 M_B_DQ34 AM32 DDR1_DQ_33/DDR1_DQ_17 AJ36 M_A_DQ44 AU37 DDR0_DQ_33/DDR1_DQ_1 W 32 M_B_DQ35 AM31 DDR1_DQ_34/DDR1_DQ_18 DDR1_CAB_4/DDR1_BA_0 W 29 M_B_BS#0 18 M_A_DQ45 AU36 AB31 DDR1_DQ_35/DDR1_DQ_19 DDR1_CAB_6/DDR1_BA_1 M_B_BS#1 18 DDR0_DQ_34/DDR1_DQ_2 DDR0_CAB_4/DDR0_BA_0 V34 M_B_DQ36 AM30 DDR1_CAA_5/DDR1_BG_0 M_B_BG#0 18 M_A_DQ46AW 36 M_A_DQ47AW 37 DDR0_DQ_35/DDR1_DQ_3 DDR0_CAB_6/DDR0_BA_1 M_A_DQ48 BA35 DDR0_DQ_36/DDR1_DQ_4 DDR0_CAA_5/DDR0_BG_0 M_B_DQ37 AM29 DDR1_DQ_36/DDR1_DQ_20 Y28 M_A_DQ49 BA34 M_B_DQ38 AJ31 DDR1_DQ_37/DDR1_DQ_21 DDR1_CAA_9/DDR1_BG_1 W 28 M_A_DQ50 BC35 DDR0_DQ_37/DDR1_DQ_5 V35 M_B_DQ39 AJ32 DDR1_DQ_38/DDR1_DQ_22 DDR1_CAA_8/DDR1_ACT# M_B_BG#1 18 W 35 M_B_ACT# 18 M_A_DQ51 BC34 DDR0_DQ_38/DDR1_DQ_6 DDR0_CAA_8/DDR0_ACT# M_A_DQ52 BA37 DDR0_DQ_39/DDR1_DQ_7 DDR0_CAA_9/DDR0_BG_1 M_B_DQ40 AR31 DDR1_DQ_39/DDR1_DQ_23 H24 M_B_DQSN0 M_A_DQ53 BA36 M_B_DQ41 AR32 DDR1_DQ_40/DDR1_DQ_24 G24 M_B_DQSP0 M_A_DQ54 BC36 DDR0_DQ_40/DDR1_DQ_8 C27 M_A_DQSN0 M_B_DQ42 AV30 DDR1_DQ_41/DDR1_DQ_25 DDR1_DQSN_0/DDR0_DQSN_2 C23 M_B_DQSN1 M_B_DQSN0 18 M_A_DQ55 BC37 D27 M_A_DQSP0 M_B_DQ43 AV29 DDR1_DQ_42/DDR1_DQ_26 DDR1_DQSP_0/DDR0_DQSP_2 D23 M_B_DQSP1 M_B_DQSP0 18 DDR0_DQ_41/DDR1_DQ_9 DDR0_DQSN_0/DDR0_DQSN_0 D31 M_A_DQSN1 M_B_DQ44 AR30 DDR1_DQ_43/DDR1_DQ_27 DDR1_DQSN_1/DDR0_DQSN_3 G30 M_B_DQSN2 M_B_DQSN1 18 M_A_DQ56 BE35 C31 M_A_DQSP1 M_B_DQ45 AR29 DDR1_DQ_44/DDR1_DQ_28 DDR1_DQSP_1/DDR0_DQSP_3 H30 M_B_DQSP2 M_B_DQSP1 18 M_A_DQ57 BE34 DDR0_DQ_42/DDR1_DQ_10DDR0_DQSP_0/DDR0_DQSP_0 J35 M_A_DQSN2 M_B_DQ46 AV32 DDR1_DQ_45/DDR1_DQ_29 DDR1_DQSN_2/DDR0_DQSN_6 L30 M_B_DQSN3 M_B_DQSN2 18 J34 M_A_DQSP2 M_B_DQ47 AV31 DDR1_DQ_46/DDR1_DQ_30 DDR1_DQSP_2/DDR0_DQSP_6 N30 M_B_DQSP3 M_B_DQSP2 18 M_A_DQ58 BG35 DDR0_DQ_43/DDR1_DQ_11DDR0_DQSN_1/DDR0_DQSN_1 P34 M_A_DQSN3 M_B_DQ48 BA32 DDR1_DQ_47/DDR1_DQ_31 DDR1_DQSN_3/DDR0_DQSN_7 AL31 M_B_DQSN4 M_B_DQSN3 18 M_A_DQ59 BG34 P35 M_A_DQSP3 M_B_DQ49 BA31 DDR1_DQ_48/DDR1_DQ_48 DDR1_DQSP_3/DDR0_DQSP_7 AL30 M_B_DQSP4 M_B_DQSP3 18 M_A_DQ60 BE37 DDR0_DQ_44/DDR1_DQ_12DDR0_DQSP_1/DDR0_DQSP_1 AP35 M_A_DQSN4 M_B_DQ50 BD31 DDR1_DQ_49/DDR1_DQ_49 DDR1_DQSN_4/DDR1_DQSN_2 AU31 M_B_DQSN5 M_B_DQSN4 18 AP34 M_A_DQSP4 M_B_DQ51 BD32 DDR1_DQ_50/DDR1_DQ_50 DDR1_DQSP_4/DDR1_DQSP_2 AU30 M_B_DQSP5 M_B_DQSP4 18 DDR0_DQ_45/DDR1_DQ_13DDR0_DQSN_2/DDR0_DQSN_4 AV34 M_A_DQSN5 M_B_DQ52 BA30 DDR1_DQ_51/DDR1_DQ_51 DDR1_DQSN_5/DDR1_DQSN_3 BC31 M_B_DQSN6 M_B_DQSN5 18 AV35 M_A_DQSP5 M_B_DQ53 BA29 DDR1_DQ_52/DDR1_DQ_52 DDR1_DQSP_5/DDR1_DQSP_3 BC30 M_B_DQSP6 M_B_DQSP5 18 DDR0_DQ_46/DDR1_DQ_14DDR0_DQSP_2/DDR0_DQSP_4 BB35 M_A_DQSN6 M_B_DQ54 BD29 DDR1_DQ_53/DDR1_DQ_53 DDR1_DQSN_6/DDR1_DQSN_6 BH31 M_B_DQSN7 M_B_DQSN6 18 BB34 M_A_DQSP6 M_B_DQ55 BD30 DDR1_DQ_54/DDR1_DQ_54 DDR1_DQSP_6/DDR1_DQSP_6 BH30 M_B_DQSP7 M_B_DQSP6 18 DDR0_DQ_47/DDR1_DQ_15DDR0_DQSN_3/DDR0_DQSN_5 BF34 M_A_DQSN7 M_B_DQ56 BG31 DDR1_DQ_55/DDR1_DQ_55 DDR1_DQSN_7/DDR1_DQSN_7 M_B_DQSN7 18 BF35 M_A_DQSP7 DDR1_DQSP_7/DDR1_DQSP_7 M_B_DQSP7 18 DDR0_DQ_48/DDR1_DQ_32DDR0_DQSP_3/DDR0_DQSP_5 +1.2VSUS DDR0_DQ_49/DDR1_DQ_33DDR0_DQSN_4/DDR1_DQSN_0 R26 470_1%_4 DDR0_DQ_50/DDR1_DQ_34DDR0_DQSP_4/DDR1_DQSP_0 DDR0_DQ_51/DDR1_DQ_35DDR0_DQSN_5/DDR1_DQSN_1 DDR0_DQ_52/DDR1_DQ_36DDR0_DQSP_5/DDR1_DQSP_1 DDR0_DQ_53/DDR1_DQ_37DDR0_DQSN_6/DDR1_DQSN_4 DDR0_DQ_54/DDR1_DQ_38DDR0_DQSP_6/DDR1_DQSP_4 DDR0_DQ_55/DDR1_DQ_39DDR0_DQSN_7/DDR1_DQSN_5 DDR0_DQ_56/DDR1_DQ_40DDR0_DQSP_7/DDR1_DQSP_5 M_B_DQ57 BG32 DDR1_DQ_56/DDR1_DQ_56 Y29 M_B_ALERT# M_B_ALERT# 18 DDR1_DQ_57/DDR1_DQ_57 AE34 M_B_PARITY M_B_PARITY 18 DDR0_DQ_57/DDR1_DQ_41 W 37 M_A_ALERT# M_B_DQ58 BK32 DDR1_DQ_58/DDR1_DQ_58 NC/DDR1_ALERT# BU31 DRAM_RESET# W 31 M_A_PARITY M_B_DQ59 BK31 DDR1_DQ_59/DDR1_DQ_59 NC/DDR1_PAR DDR0_DQ_58/DDR1_DQ_42 NC/DDR0_ALERT# M_B_DQ60 BG29 DRAM_RESET# R27 *Short_0402 DDR4_DRAMRST# 17,18 DDR0_DQ_59/DDR1_DQ_43 NC/DDR0_PAR B M_A_DQ61 BE36 DDR0_DQ_60/DDR1_DQ_44 DDR_VREF_CA F36 SM_VREF SM_VREF 17 For CH:A M_B_DQ61 BG30 DDR1_DQ_60/DDR1_DQ_60 DDR_COMP_0 BN28 SM_RCOMP_0 R28 121_1%_4 M_A_DQ62 BG36 DDR0_DQ_61/DDR1_DQ_45 DDR0_VREF_DQ_0 M_B_DQ62 BK30 DDR1_DQ_61/DDR1_DQ_61 DDR_COMP_1 BN27 SM_RCOMP_1 R29 80.6_1%_4 M_A_DQ63 BG37 DDR0_DQ_62/DDR1_DQ_46 DDR0_VREF_DQ_1 D35 M_B_DQ63 BK29 DDR1_DQ_62/DDR1_DQ_62 DDR_COMP_2 BN29 SM_RCOMP_2 R30 100_1%_4 DDR4_DRAMRST# DDR0_DQ_63/DDR1_DQ_47 DDR1_DQ_63/DDR1_DQ_63 DDR1_VREF_DQ D37 SMDDR_VREF_DQ1_M3 18 For CH:B C3 DDR_VTT_CNTL E36 SMDDR_VREF_DQ1_M3 3 of 20 *0.1u/16V_2 C35 DDR_VTT_CNTL TP1 WHL_U_43E_IL_IP_DDR4 Layout: DDR Rcomp need follow Intel Spec 15 mil trance length 2 of 20 WHL_U_43E_IL_IP_DDR4 A A Quanta Computer Inc. PROJECT : ZAW Size Document Number Rev KBL-U 2/15(DDR4 I/F) 1A Date: Wednesday, February 27, 2019 Sheet 3 of 48 5 4 3 2 1 5 4 3 2 1 10,11,13,14,15 +3V_DEEP_SUS SUSB# PCH Pull-high/low(CLG) $ SUSC# +3V_DEEP_SUS D 2,10,11,12,13,14,15,17,20,22,25,26,27,28,30,31,32,33,34,35,37,38,39,40,43,44,45,46 +3V C 2,10,12,13,14,15,28,29,30,33,34,37,39,43 +3V_S5 C5 C6 13,15,34,35 +3V_RTC *0.47u/6.3V_2 *0.47u/6.3V_2 SUSPWRDNACK R31 *10K_5%_4 *10K_5%_4 SUSACK# R32 +3V_S5 U1K 8.2K_5%_4 10K_5%_4 D Lesson learn PLTRST# BJ35 GPP_B13/PLTRST# GPP_B12/SLP_S0# BJ37 PCH_SLP_S0_N PCH_SLP_S0_N 31 10K_5%_4 SYS_RESET# CN10 SYS_RESET# GPD4/SLP_S3# BU36 SLP_S5# SUSB# 34 8.2K_5%_4 R34 RSMRST# GPD5/SLP_S4# BU27 SUSC# 34 100K_1%_4 34 RSMRST# C7 RSMRST# BR36 BT29 TP3 PCIE_WAKE# R33 100K_1%_4 PROCPW RGD GPD10/SLP_S5# 100K_1%_4 TP5 C6619 0.1u/6.3V_2 VCCST_PW RGOOD TP9027 +3V *1K_5%_4 PROCPWRGD AR2 SYS_PW ROK TP7 AC_PRESENT_EC R35 10K_1%_2 PCH_PW ROK 10K_5%_4 EC1 H_VCCST_PWRGD BJ2 SLP_SUS# BU29 SLP_SUS#_EC 10K_5%_4 *220p/50V_4 SLP_LAN# 10K_5%_4 *0.1u/16V_2 GPD9/SLP_W LAN# BT31 SLP_LAN# TP4 LAN_WAKE# R36 SYS_PWROK BT30 TP6 CR10 BU37 GPD9 SLP_A# PCH_PWROK_R BP31 GPD6/SLP_A# RF_OFF_PCH R37 DSWROK_EC_R BP30 DSW _PW ROK GPP_A13/SUSW ARN#/SUSPW RDACK GPD3/PW RBTN# BU28 DNBSWON# DNBSWON# 34 PCH_SLP_S0_N R38 GPP_A15/SUSACK# GPD1/ACPRESENT BU35 AC_PRESENT_EC AC_PRESENT_EC 34 34 PCH_SUSPWRDNACK *0_5%_4 R39 SUSPWRDNACK BV34 BV36 GPD0/BATLOW # RF_OFF_PCH TP9018 SUSACK# BY32 EXT_PWR_GATE# R40 28,33 PCIE_WAKE# PCIE_WAKE# BU30 W AKE# DSWROK_EC R41 LAN_WAKE# BU32 GPD2/LAN_W AKE# BU34 GPD11/LANPHYPC INTRUDER# BR35 INTRUDER#_RR42 1M_5%_2 +3V_RTC EXT_PWR_GATE# GPP_B11/EXT_PW R_GATE# CC37 GPP_B2/VRALERT# CC36 BT27 SYS_RESET# R43 INPUT3VSEL PCH_PWROK_R R25501 RSMRST# WHL_U_43E_IL_IP_DDR141 of 20 R44 3V SELECT STRAP DSWROK_EC_R R45 4.7K_5%_2 LOW-> 3.3V R46 C For DS3 Sequence For DS3 -->Ra Non-DS3 -->Rb SI Rb RSMRST# R47 *Short_0402 +VCCST TP9026 DSWROK_EC R51 *0_5%_4 DSWROK_EC_R Ra C8 R52 0.01u/50V_4 1K_5%_2 34 HWPG D1 1 2 RB500V-40 Ra 60.4_1%_2H_VCCST_PWRGD H_VCCST_PWRGD_R R54 PLTRST#(CLG) C9 *10P/50V_4 Check Rise/Fall time less than 100ns B PLTRST# 19,28,31,33,34 R56 100K_1%_4 B Ra close to CPU side H_VCCST_PWRGD trace 0.3" - 1.5" SYSPWOK +3V_DEEP_SUS C6609 *0.1u/16V_2 5 1 EC_PWROK EC_PWROK 34 IMVP_PWRGD 2,40 SYS_PWROK 4 R25359 R25358 3 2 10K_1%_2 U6504 *NL17SZ08DFT2G *0_5%_4 A R25362 *Short_0402 A PCH_PWROK_R R25357 *Short_0402 PCH_PWROK 34 Quanta Computer Inc. PROJECT : ZAW Size Document Number Rev 1A KBL-U 3/15(PowerManger) 48 Date: Wednesday, February 27, 2019 Sheet 4 of 1 5 4 3 2 5 4 3 2 1 7,40,41 +VCC_CORE +VCC_CORE +VCC_CORE 1/22WHL PART , 6 +VCCSTG U1L AW 24 AN9 AN10 VCCCORE5 VCCCORE35 AW 25 VCCCORE1 VCCCORE36 Under CPU AN24 VCCCORE2 VCCCORE37 AW 26 Under CPU AN26 VCCCORE3 VCCCORE38 AW 27 AN27 AY24 AP2 VCCCORE4 VCCCORE44 AY26 AP9 VCCCORE6 VCCCORE45 BA5 AP24 VCCCORE9 VCCCORE48 BA7 VCCCORE7 VCCCORE49 C16 C17 C18 C22 C23 C24 C25 C26 C27 C28 + C29 C11 C19 C20 C12 C13 C14 C21 C15 AP26 VCCCORE8 VCCCORE50 BA8 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 22u/6.3V_6 *22u/6.3V_6 22u/6.3V_6 *330u/2.5V_3528H1.9 AR5 VCCCORE13 VCCCORE46 BA25 *10U/6.3V_4 22u/6.3V_6 10u/6.3V_4 10u/6.3V_4 *22U/6.3V_6 10u/6.3V_4 22u/6.3V_6 22u/6.3V_6 AR6 BA27 112 3 4 -%""2%- *$ D AR7 VCCCORE14 VCCCORE47 BB2 D AR8 VCCCORE15 VCCCORE51 BB26 AR10 VCCCORE16 VCCCORE52 BC5 (!) -)$.( $)5 AR25 VCCCORE10 VCCCORE56 BC6 VCCCORE11 VCCCORE57 C30 C31 C41 C42 C43 C44 C45 C46 AR27 VCCCORE12 VCCCORE58 BC7 C32 C33 C34 C35 C36 C37 C38 C39 C40 +VCC_CORE 10u/6.3V_4 *22u/6.3V_6 AT9 VCCCORE19 VCCCORE59 BC9 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 10u/6.3V_4 VCCCORE17 VCCCORE53 BC10 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 *22U/6.3V_6 AT24 BC26 AT26 AU5 VCCCORE18 VCCCORE54 BC27 AU6 VCCCORE24 VCCCORE55 BD5 AU7 VCCCORE25 VCCCORE63 BD8 C47 AU8 VCCCORE26 VCCCORE64 BD10 0.1U/16V_2 AU9 VCCCORE27 VCCCORE60 BD25 VCCCORE28 VCCCORE61 C48 C49 C50 C51 C52 C53 C54 C55 AU24 VCCCORE20 VCCCORE62 BD27 *22u/6.3V_6 22u/6.3V_6 AU25 VCCCORE21 VCCCORE69 BE9 *22u/6.3V_6 *22U/6.3V_6 *22u/6.3V_6 *22U/6.3V_6 *22u/6.3V_6 *22u/6.3V_6 AU26 VCCCORE22 VCCCORE65 BE24 AU27 BE25 U1O AV2 VCCCORE23 VCCCORE66 BE26 WHL=>RSVD K12 AA24 WHL=>RSVD AV5 VCCCORE30 VCCCORE67 BE27 K14 VCCOPC1 VCCEOPIO1 AA26 AV7 VCCCORE32 VCCCORE68 BF2 K15 VCCOPC2 VCCEOPIO2 AB25 AV10 VCCCORE33 VCCCORE70 BF9 K17 VCCOPC3 VCCEOPIO3 AC24 AV27 VCCCORE29 VCCCORE73 BF24 K18 VCCOPC4 VCCEOPIO4 AC25 AW 5 VCCCORE31 VCCCORE71 BF26 K20 VCCOPC5 VCCEOPIO5 AC26 AW 6 VCCCORE39 VCCCORE72 BG27 L25 VCCOPC6 VCCEOPIO6 AD24 AW 7 VCCCORE40 VCCCORE74 M24 VCCOPC7 VCCEOPIO7 AD26 AW 8 VCCCORE41 AN6 VCORE_SENSE 40 M26 VCCOPC8 VCCEOPIO8 AW 9 VCCCORE42 VCC_SENSE AN5 P24 VCCOPC9 V25 AW 10 VCCCORE43 VSS_SENSE VCORESS_SENSE 40 Close CPU P26 VCCOPC10 VCCEOPIO_SENSE T25 VCCCORE34 R24 VCCOPC11 VSSEOPIO_SENSE AA3 H_CPU_SVIDALRT# VIDALERT# R25 VCCOPC12 C BB9 C BC24 RSVD3 R26 VCCOPC13 AY9 RSVD4 VIDSCK AA1 VR_SVID_CLK_R VCCOPC14 BB24 RSVD1 AA2 H_CPU_SVIDDAT_R W 25 RSVD2 VIDSOUT V24 VCC_OPC_1P82 Y3 VCC_OPC_1P81 RSVD5 Y25 BG3 +VCCSTG Y24 VCC_OPC_1P84 VCCSTG1 VCC_OPC_1P83 Close CPU 12 of 20 WHL_U_43E_IL_IP_DDR4 +VCC_CORE 15 of 20 +VCCST +VCCPLL WHL_U_43E_IL_IP_DDR4 C56 C57 10u/6.3V_4 10u/6.3V_4 C58 C59 C60 C61 C62 C63 C64 C65 47U/6.3VS_6 47U/6.3VS_6 *47U/6.3VS_6 47U/6.3VS_6 47U/6.3VS_6 47U/6.3VS_6 47U/6.3VS_6 47U/6.3VS_6 +VCC_CORE B C66 C67 C68 C69 C70 C71 C72 C73 Layout note: need routing together and ALERT need between CLK and DATA. B 10u/6.3V_4 10u/6.3V_4 *22U/6.3V_6 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 *22U/6.3V_6 +VCCST CLOSE TO CPU R63 PLACE THE PU RESISTORS 56.2_1%_4 H_CPU_SVIDALRT# R64 220_1%_4 SVID ALERT VR_SVID_ALERT#_VCORE 40 +VCCST PLACE THE PU RESISTORS R65 CLOSE TO VR *54.9/F_4 PULL UP IS IN THE VR MODULE SVID CLK VR_SVID_CLK_R R66 *0_4/S H_CPU_SVIDCLK 40 +VCCST A A 5 R67 100_1%_4 CLOSE TO CPU R68 *0_4/S SVID DATA Quanta Computer Inc. PLACE THE PU RESISTORS H_CPU_SVIDDAT 40 PROJECT : ZAW H_CPU_SVIDDAT_R Size Document Number Rev KBL-U 4/15 (POWER-1) 1A Date: Wednesday, February 27, 2019 Sheet 5 of 48 4 3 2 1 5 4 3 2 1 +VCCSA 40,42 ' +1.2VSUS 3,17,18,39,46 +1.05V_DEEP_SUS 9,15,38 +3VPCU 13,25,26,30,31,34,35,36,37 +VCCIO Under CPU +1.2VSUS U1N AK24 Under CPU Close CPU AD36 VCCIO1 AK26 AH32 VDDQ1 VCCIO2 AL24 AH36 VDDQ2 VCCIO3 AL25 VDDQ3 VCCIO4 D AM36 VDDQ4 VCCIO5 AL26 C78 C79 C80 C81 C82 C83 C84 C85 C86 C89 D AN32 VDDQ5 VCCIO6 AL27 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 C77 C74 C75 C87 C76 C88 AW 32 VDDQ6 VCCIO7 AM25 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 1u/6.3V_2 AY36 AM27 10u/6.3V_4 10u/6.3V_4 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 BE32 VDDQ7 VCCIO8 BH24 BH36 VDDQ8 VCCIO9 BH25 R32 VDDQ9 VCCIO10 BH26 Y36 VDDQ10 VCCIO11 BH27 VDDQ11 VCCIO12 BJ24 VCCIO13 BJ26 VCCIO14 BP16 C90 C91 C92 C93 VCCIO15 BP18 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 BC28 RSVD1 VCCIO16 C94 C95 +VCCSA *10U/6.3V_4 1u/6.3V_2 +VCCST BP11 BG8 BP2 VCCST1 VCCSA2 BG10 Close CPU VCCST2 VCCSA1 BH9 Under CPU VCCSA3 BJ8 VCCSA5 +VCCIO +VCCSTG +VCCSTG BG1 VCCSTG1 VCCSA6 BJ9 C96 C97 C98 C99 C100 C101 C102 C103 C104 C105 C106 C107 C108 C109 BG2 VCCSTG2 VCCSA4 BJ10 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 Close CPU Under CPU VCCSA9 BK8 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 BL27 VCCPLL_OC1 VCCSA7 BK25 R69 *Short_0402 +VCCPLL_OC BM26 VCCPLL_OC2 VCCSA8 BK27 BL8 VCCSA13 +VCCST +VCCPLL BR11 VCCSA14 BL9 Close CPU BT11 VCCPLL1 VCCSA10 BL10 R70 *Short_0603 +VCCPLL VCCSA11 BL24 C110 C111 C112 C113 C114 C115 VCCPLL2 VCCSA12 BL26 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 BM24 VCCSA15 BN25 Add o ohm +1V_S5 check again Volume +VCCPLL_OC VCCSA16 C +1.2VSUS BP28 VCCIO_VCCSENSE C VCCIO_SENSE BP29 VCCIO_VSSSENSE VSSIO_SENSE +1V_SUS +VCCST R71 *Short_0603 R9261 *Short_0805 BE7 VSSSA_SENSE 40 VSSSA_SENSE BG7 VCCSA_SENSE 40 VCCSA_SENSE 14 of 20 +VCCIO WHL_U_43E_IL_IP_DDR4 VCCIO_VCCSENSE R72 100_1%_2 Under CPU VCCIO_VSSSENSE R74 100_1%_2 +VCCSTG +VCCPLL_OC C116 C117 1u/6.3V_2 1u/6.3V_2 Close BP11 Ball +VCCST B B C118 C119 1u/6.3V_2 22U/6.3V_6 Close CPU +VCCPLL +VCCST C122 C123 1u/6.3V_2 1u/6.3V_2 +1.2VSUS A A C124 C125 C126 C127 C128 C129 C130 C131 C132 C133 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 10u/6.3V_4 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 1u/6.3V_2 10u/6.3V_4 10u/6.3V_4 Quanta Computer Inc. PROJECT : ZAW S