MacBook Pro 13-inch A2485 (2022) (820-01987) Boardview & Schematic
Interactive boardview and full 100-page schematic for the MacBook Pro 13-inch A2485 (2022) (820-01987) logic board. Search a designator or a net name and the viewer will show you exactly where the part sits, which side it is on, and what every pad connects to.
5,281Components
2,841Nets
16,230Pads
1,654Test points
205.84 × 83.64 mmBoard size
100Schematic pages
Interactive boardview
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Top side Bottom side Through-hole Test point
Schematic
The full 100-page schematic for this board. Use your browser's zoom and find controls inside the viewer — it is a real PDF, so the text is selectable and searchable. If it does not render below, the download button at the top opens it directly.
MacBook Pro 13-inch A2485 (2022) (820-01987) — 100-page schematic
Open in new tabDownload PDFAbout this MacBook Pro 13-inch A2485 (2022) (820-01987) board
This page is generated from the board file itself, so the map above is the manufacturer layout rather than a redrawing of it. The board carries 5,281 components and 2,841 named nets across 16,230 pads, with 1,654 test and probe points marked in amber for when you want to measure rather than desolder. About 100% of the components are surface-mount, so the top and bottom side filter is usually the difference between finding a part in one pass and searching both faces.
The schematic is 100 pages and covers the usual blocks you would expect on a board this size — input power, PPBUS/G3 hot, rails, clock, storage, display and audio output. The page index under the viewer gives you the heading on each sheet, so you can jump straight to the block you are chasing instead of scrolling.
This is the logic board fitted to the A2485 (M2 2022), covering the 2022 production run. Check the board number before you order parts: several of these machines shipped with more than one board revision, and a component taken off the wrong revision frequently has the same designator and a different footprint.
Frequently asked about the MacBook Pro 13-inch A2485 (2022) (820-01987)
What board number is the MacBook Pro 13-inch A2485 (2022) (820-01987)?
The MacBook Pro 13-inch A2485 (2022) (820-01987) uses logic board 820-01987, the board fitted to the A2485. There is more than one revision of some of these boards, so check the number on the board itself against the one on this page before you order a part — a component from a different revision will often not fit or will not reference the same nets.
How many components and nets are on the MacBook Pro 13-inch A2485 (2022) (820-01987)?
The board file records 5,281 components (5,271 surface-mount, 10 through-hole), 2,841 named nets and 16,230 pads, plus 1,654 test and probe points. The board measures 205.84 × 83.64 mm. Roughly 100% of the parts are surface-mount, which is why the top and bottom side filter matters — a lot of this board is only reachable from one face.
How do I use this MacBook Pro 13-inch A2485 (2022) (820-01987) boardview?
Type a designator such as a component reference, or a net name, into the search box above. A net name takes priority and highlights every pad on that net across the whole board. Clicking a component outlines it in white and lists every pad it has with the net each one belongs to; clicking one of those nets jumps the highlight to the whole rail. Use the side filter to isolate the top or bottom face, and the designator toggle to hide the reference text when you are zoomed out.
Does the MacBook Pro 13-inch A2485 (2022) (820-01987) come with a schematic?
Yes — the full 100-page schematic is embedded above and downloadable as a 3.7 MB PDF. The page index under the viewer lists the page headings so you can jump to a circuit rather than scrolling through every page. The schematic's text layer is also published as text on this page, which means you can search it with Ctrl+F on any browser, including the ones where a PDF in a frame refuses to be searched.
Can I download the MacBook Pro 13-inch A2485 (2022) (820-01987) boardview file?
Yes. The original 845 KB BoardView file is linked below under downloads, named macbook-pro-13-inch-a2485-820-01987.brd. Open it in BoardViewer or any other tool that reads the .brd format. The interactive viewer on this page is for looking things up quickly; the .brd is what you want when you are at the bench with the board on the mat.
Schematic text — searchable without opening the PDF
A PDF inside a frame is invisible to a crawler and often unsearchable in the browser. Here is the schematic’s text layer as plain text, so you can use Ctrl+F on this page to find a rail name, a component reference or a page heading.
8 7 6 5 4 3 2 1 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. X1782 MLB SCHEMATIC REV ECN DESCRIPTION OF REVISION CK 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. APPD 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. 6 0021824637 ENGINEERING RELEASED DATE 2020-01-24 PAGE CSA CONTENTS SYNC DATE PAGE CSA CONTENTS SYNC DATE 61 67 KEYBOARD & TRACKPAD 1 X1412_SHAN 05/17/2019 1 1 TABLE OF CONTENTS 62 68 KEYBOARD & TRACKPAD 2 63 69 BATTERY CONN, 3V3 G3H RTC VR D 2 2 SYSTEM PCB SUMMARY 64 70 PBUS SUPPLY & BATTERY CHARGER D 65 71 VR CORE & SA IMVP CTRL 3 4 PD PARTS 66 72 VR CORE & SA IMVP 67 74 VR GT & GTX IMVP 4 5 CPU GFX 68 76 VR 5V, 3V3 69 77 VR EOPIO EDRAM 5 6 CPU MISC/JTAG/CFG/RSVD 70 78 PMIC BUCKS AND SWS 71 79 PMIC LDOS 6 7 CPU LPDDR3 INTERFACE 72 80 PMIC GPIOS & CONTROL 73 81 VR VDDQ VCCIO 7 8 CPU & PCH POWER 74 82 POWER FETS 75 84 LCD BACKLIGHT DRIVER 8 9 CPU & PCH GROUNDS 76 85 EDP DISPLAY CONNECTOR 77 86 S4E<0> 9 10 CPU CORE DECOUPLING 78 87 S4E<1> 79 88 S4E<2> 10 11 CPU GT DECOUPLING 80 89 S4E<3> 81 90 OCARINA PMIC & NAND VCC VR & VDDIO1 SWCH 11 12 PCH DECOUPLING 82 96 SSD SUPPORT 83 124 FCT 12 13 PCH AUDIO/LPC/SPI/SMBUS 84 125 PROBE POINTS 85 135 DESENSE 1 13 14 PCH POWER MANAGEMENT 86 136 DESENSE 2 87 137 DESENSE 3 14 15 PCH PCIE/USB/CLKS 88 138 DESENSE 4 89 140 DEV SUPPORT 1 15 16 PCH SPI/UART/GPIO 90 141 DEV SUPPORT 2 91 400 BOM CONFIGURATION 16 18 CPU/PCH MERGED XDP 92 401 BOM CONFIGURATION 93 403 BOM GROUPS 17 19 CHIPSET SUPPORT 1 94 405 BOM VARIANT TABLES 95 406 BOM VARIANT TABLES 18 20 CHIPSET SUPPORT 2 96 407 BOM VARIANT TABLES 97 410 BOM ALTERNATES 19 22 LPDDR3 VREF MARGINING 98 500 BOARD RULES C 20 23 LPDDR3 DRAM CHANNEL A (00-31) C B 21 24 LPDDR3 DRAM CHANNEL A (32-63) 22 25 LPDDR3 DRAM CHANNEL B (00-31) 23 26 LPDDR3 DRAM CHANNEL B (32-63) 24 27 LPDDR3 DRAM TERMINATION 25 28 USB-C HIGH SPEED 1 26 29 USB-C HIGH SPEED 2 27 30 USB-C SUPPORT 28 31 USB-C PORT CONTROLLER A 29 32 USB-C PORT CONTROLLER B 30 33 USB-C CONNECTOR A 31 36 WIFI/BT SUPPORT J223_METE 05/14/2019 J223_METE 05/14/2019 32 37 WIFI/BT MODULE 1 J223_METE 05/14/2019 33 38 WIFI/BT MODULE 2 34 39 SOC GPIO/SEP/USB/DDR/TEST 35 40 SOC AOP/AON/SMC 36 41 SOC ISP/I2C/UART/SPI/I2S B 37 42 SOC PCIE 38 43 SOC POWER 1 39 44 SOC POWER 2 40 45 SOC POWER 3 41 46 SOC GROUND 42 47 SOC SHARED SUPPORT 43 48 SOC PROJECT SUPPORT 44 49 T151 45 50 SECURE ELEMENT 46 51 T139 SUPPORT 47 52 I2C CONNECTIONS 1 48 53 I2C CONNECTIONS 2 49 54 POWER SENSORS HIGH SIDE 50 55 POWER SENSORS LOAD SIDE 51 56 POWER SENSORS EXTENDED 52 57 POWER SENSORS EXTENDED 2 53 58 THERMAL SENSORS 54 59 POWER SENSORS EXTENDED 3 A 55 60 FANS/SMC/AMUX SUPPORT A 56 62 AUDIO PLACEHOLDER DRAWING TITLE SCHEM,MLB,X1782 57 63 AUDIO JACK CODEC DRAWING NUMBER SIZE 58 64 AUDIO LEFT AMPLIFIERS Apple Inc. 051-05309 D 59 65 AUDIO RIGHT AMPLIFIERS NOTICE OF PROPRIETARY PROPERTY: REVISION THE INFORMATION CONTAINED HEREIN IS THE 6.0.0 PROPRIETARY PROPERTY OF APPLE INC. 60 66 AUDIO FLEX CONNECTORS THE POSESSOR AGREES TO THE FOLLOWING: BRANCH I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE pvt II NOT TO REPRODUCE OR COPY IT LAST_MODIFICATION=Fri Jan 17 17:25:04 2020 III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART PAGE IV ALL RIGHTS RESERVED 1 OF 500 SHEET 1 OF 98 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 D DESIGN DESCRIPTION SCHEMATIC BOARD MCO PANEL D J223/MLB POR CFL MLB 051-05309 820-01987 056-09380 057-01595-D J213/FLEX_AUDIOJACK AUDIO JACK, 051-04122 821-02091 056-07548-27 N/A AMR, AND MESA J680/FLEX_USBC LEFT SIDE USB 051-03140 821-01646 056-05483-A N/A TONGUE FLEX J130/FLEX_BMU_SIGNAL SIGNALS TO 051-01247 821-01726 056-05589-A N/A BMU J130/FLEX_BMU_PWR POWER TO/FROM 051-01195 821-00583 056-02919-A N/A BMU C J130/FLEX_TCON_MLB_A DISPLAYPORT FROM 051-01897 821-00981 056-02852-A N/A C MLB TO TCON J213/FLEX_TRACKPAD MLB TO 051-04335 821-02218 056-07655-08 N/A TRACKPAD J130/FLEX_KB KB FLEX FOR ALL 051-02011 821-01046 056-03725-B N/A 3 KB TYPES J213/FLEX_3MIC MIC FLEX 051-04441 821-02265 056-07754-24 N/A J79/GRAPE_FLEX DFR TOUCH FLEX 051-01338 821-00681 056-02220-A N/A DFR DAUGHTER FLEX DFR DAUGHTER VENDOR VENDOR 099-14398 N/A FLEX B B A A SYSTEM PAGE TITLE PCB SUMMARY DRAWING NUMBER SIZE Apple Inc. 051-05309 D NOTICE OF PROPRIETARY PROPERTY: REVISION THE INFORMATION CONTAINED HEREIN IS THE 6.0.0 PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: BRANCH I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE pvt II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART PAGE IV ALL RIGHTS RESERVED 2 OF 500 SHEET 2 OF 98 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 TOP SIDE STANDOFFS USB-C BOSS DFR WASHER POGO PINS BACKLIGHT MLB MTG HOLES 2.1X3.36 MM OMIT_TABLE CRITICAL CRITICAL CRITICAL CRITICAL 998-19711 Z0400 Z0420 Z0431 PP0400 ZT0420 NEAR RIGHT SPKR CONNECTOR TH-NSP 2.8OD1.2ID-1.49H-SM 3.4OD1.75ID-1.12H-SM 4.75OD2.73ID-H0.2 POGO-2.3OD-4.06H-SM 1 1 860-01216 1 860-00392 RING-TH SM-1 SL-2.1X3.51-4.6X6.01 2 1 EAST OF NAND ALIGNED WITH 1 CRITICAL BOTTOM SIDE STANDOFF 870-09670 CRITICAL ZT0421 CRITICAL TH-NSP OMIT_TABLE 860-01519 Z0421 1 998-19711 Z0401 WIFI WASHER POGO PIN DISPLAY 3.4OD1.75ID-1.12H-SM SL-2.1X3.51-4.6X6.01 2.8OD1.2ID-1.49H-SM CRITICAL D 860-00392 D 1 Z0432 CRITICAL NEAR TRACKPAD CONNECTOR 1 860-01216 4.75OD2.73ID-H0.2 PP0420 2 RING-TH POGO-2.3OD-4.0H-SM 1 SM-1 CRITICAL NORTH OF NAND 860-01519 1 DFR BOSS 870-09667 CRITICAL 998-19711 OMIT_TABLE CRITICAL ZT0422 NEAR LEFT SPKR CONNECTOR Z0402 TH-NSP Z0430 1 2.8OD1.2ID-1.49H-SM 3.4OD1.75ID-1.5H-SM SL-2.1X3.51-4.6X6.01 1 860-01216 1 860-01484 POGO PINS DRAM 2 NORTH OF NAND CRITICAL CRITICAL PP0410 OMIT_TABLE TRACKPAD BOSS 870-09667 POGO-2.3OD-4.0H-SM Z0404 SM-1 2.8OD1.2ID-1.49H-SM 1 1 860-01216 CRITICAL CPU THERM STAGE HOLES 3.15 MM 2 FAR SIDE NEAR AJ CONN Z0440 POGO PIN FAN CRITICAL CRITICAL 3.5OD1.85ID-1.41H-SM CRITICAL ZT0400 1 860-00381 CRITICAL PP0411 3P9R3P15 998-0845 PP0430 POGO-2.3OD-4.0H-SM 1 SM-1 OMIT_TABLE POGO-2.3OD-4.0H-SM CORNER NEAREST KEYBOARD SM-1 1 Z0405 870-09667 1 2.8OD1.2ID-1.49H-SM 1 CRITICAL 870-09667 CPU THERM STAGE HOLES 3.6 MM 860-01216 Z0441 2 3.5OD1.85ID-1.41H-SM C CRITICAL SOUTH OF NAND 1 860-00381 C CRITICAL ZT0401 SHIELD CAN ALIGMENT HOLES 4.0R3.6-NSP OMIT_TABLE 998-03850 1 Z0406 DISPLAY BOSS CRITICAL 2.8OD1.2ID-1.49H-SM 860-01216 CRITICAL ZT0441 998-04440 CRITICAL 998-03850 1 TH-NSP 998-04440 NORTH OF NAND Z0450 1 998-04440 ZT0402 2 SL-1.2X0.4-1.5X0.7 998-04440 2.7X1.8R-1.4ID-0.91H-SM 998-04440 4.0R3.6-NSP CRITICAL CRITICAL 998-04440 1 860-00469 ZT0442 1 TH-NSP 1 BOTTOM SIDE TALL STANDOFF CRITICAL SL-1.2X0.4-1.5X0.7 CRITICAL OMIT_TABLE Z0451 CRITICAL ZT0403 998-03850 Z0460 2.7X1.8R-1.4ID-0.91H-SM ZT0443 4.0R3.6-NSP TH-NSP 2.8OD1.2ID-3.15H-SM 1 1 SL-1.2X0.4-1.5X0.7 1 1 860-00469 CRITICAL 2 860-01485 FAN MTG HOLE 2.0X2.6 MM ZT0444 EAST OF NAND ALIGNED WITH TH-NSP CRITICAL TOP SIDE STANDOFF 1 SL-1.2X0.4-1.5X0.7 ZT0430 AJ FLEX COWLING BOSS TH-NSP CRITICAL 1 CRITICAL 998-03974 ZT0445 SL-2.6X2.0-4.7X4.1 Z0470 TH-NSP B POGO PIN HEAT PIPE 1 B 3.5OD1.85ID-1.92H-SM SL-1.2X0.4-1.5X0.7 1 860-00382 CRITICAL CRITICAL ZT0446 SHIELD CAN ALIGNMENT SLOTS DRAM TH-NSP PP0499 870-09667 1 CRITICAL SL-1.2X0.4-1.5X0.7 POGO-2.3OD-4.0H-SM SL0490 SM-1 TH-NSP 1 1 SL-1.2X0.4-1.5X0.7 998-04440 NOTE: REFER TO BOM TABLES. ONLY SOLDERED PARTS REMAIN IN RAMP/PVT SMT BOM. OTHERS MOVED TO POST-SMT ENCLOSURE BOM CRITICAL 998-04440 SL0491 TH-NSP 1 SL-1.2X0.4-1.5X0.7 USB-C SHIELD 2X PLATED SLOTS IN MEM AREA DUE TO SPACE CONSTRAINTS <RDAR://44382678> 806-24341 1 USBC_CAN CRITICAL USBC_SHLD LIQUID SPILL INDICATOR ALL OTHER SHIELD ALIGNMENT SLOTS ARE USBC_CAN_TAPE CRITICAL USBC_TAPE NPTH + GND RING FOR BETTER TOLERANCE 870-08656 1 SHIELD CAN,HOLES,TITAN RIDGE,X1781 MEGA_SHLD 825-00493 4 LSI1,LSI2,LSI3,LSI4 CRITICAL LSI TAPE,NON COND,STIFFENER,TITAN RIDGE,CAN,X1533 CPU_SLEDS DRAM_TOP_FENC DRAM_TOP_TAPE LSI,BLACK,REEL,X1030 MEGA SHIELD DRAM_BOT_CAN CPU SLEDS DRAM_BOT_TAPE 604-27117 1 MEGA CAN,INSULATED,X1781 MEGA_CAN CRITICAL 806-14839 2 SLED1,SLED2 CRITICAL SLED,METAL,MATT NICKEL,X940 A SYNC_MASTER= A PAGE TITLE DRAM SHIELD TOP SYNC_DATE= PD PARTS 806-24340 1 FENCE,DRAM,UNIV,X1781 DRAM_TOP_FENCE CRITICAL DRAWING NUMBER SIZE DRAM_TOP_FENCE_TAPE CRITICAL 870-07840 1 TAPE,COND,DRAM,UNIV,X1533 TOP SIDE STANDOFFS Apple Inc. 051-05309 D DRAM SHIELD BOTTOM 860-01216 6 BOSS,STANDOFF,MLB,X1533 Z0400-Z0402,Z0404-Z0406 CRITICAL STANDOFFS_TOP REVISION 6.0.0 NOTICE OF PROPRIETARY PROPERTY: BRANCH 806-24339 1 SHIELD CAN,HOLES,DRAM,UNIV,X1781 DRAM_BOT_CAN CRITICAL BOTTOM SIDE STANDOFFS THE INFORMATION CONTAINED HEREIN IS THE pvt DRAM_BOT_CAN_TAPE CRITICAL PROPRIETARY PROPERTY OF APPLE INC. 870-08657 1 TAPE,NON COND,STIFFENER,DRAM,CAN 860-01485 1 BOSS,STANDOFF,MLB,TALL,X1533 Z0460 CRITICAL STANDOFFS_BOT THE POSESSOR AGREES TO THE FOLLOWING: PAGE I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE 4 OF 500 II NOT TO REPRODUCE OR COPY IT BOM_COST_GROUP=MECHANICALS III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET IV ALL RIGHTS RESERVED 3 OF 98 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 D D C 25 OUT DP_X_SNK0_ML_C_N<0> AL5 DDI1_TXN[0] U0500 EDP_TXN[0] AG4 EDP_ML_N<0> OUT 76 25 OUT DP_X_SNK0_ML_C_P<0> AL6 DDI1_TXP[0] EDP_TXP[0] AG3 EDP_ML_P<0> OUT 76 25 OUT DP_X_SNK0_ML_C_N<1> AJ5 DDI1_TXN[1] CFL-U EDP_TXN[1] AG2 EDP_ML_N<1> OUT 76 25 OUT DP_X_SNK0_ML_C_P<1> AJ6 DDI1_TXP[1] 4+3E EDP_TXP[1] AG1 EDP_ML_P<1> OUT 76 25 OUT DP_X_SNK0_ML_C_N<2> AF6 DDI1_TXN[2] EDP_TXN[2] AJ4 EDP_ML_N<2> OUT 76 25 OUT DP_X_SNK0_ML_C_P<2> AF5 DDI1_TXP[2] BGA EDP_TXP[2] AJ3 EDP_ML_P<2> OUT 76 25 OUT DP_X_SNK0_ML_C_N<3> AE5 DDI1_TXN[3] EDP_TXN[3] AJ2 EDP_ML_N<3> OUT 76 25 OUT DP_X_SNK0_ML_C_P<3> AE6 DDI1_TXP[3] SYM 1 OF 20 EDP_TXP[3] AJ1 EDP_ML_P<3> OUT 76 OMIT_TABLE 25 OUT DP_X_SNK1_ML_C_N<0> AC4 DDI2_TXN[0] DDI EDP_AUX_N AH4 EDP_AUXCH_N EDP BI 76 25 OUT DP_X_SNK1_ML_C_P<0> AC3 DDI2_TXP[0] EDP_AUX_P AH3 EDP_AUXCH_P BI 76 25 OUT DP_X_SNK1_ML_C_N<1> AC1 DDI2_TXN[1] 25 OUT DP_X_SNK1_ML_C_P<1> AC2 DDI2_TXP[1] DISP_UTILS AM7 NC 25 OUT DP_X_SNK1_ML_C_N<2> AE4 DDI2_TXN[2] DDI1_AUX_N AC7 DP_X_SNK0_AUXCH_C_N BI 25 25 OUT DP_X_SNK1_ML_C_P<2> AE3 DDI2_TXP[2] DDI1_AUX_P AC6 DP_X_SNK0_AUXCH_C_P BI 25 25 OUT DP_X_SNK1_ML_C_N<3> AE1 DDI2_TXN[3] DDI2_AUX_N AD4 DP_X_SNK1_AUXCH_C_N BI 25 25 OUT DP_X_SNK1_ML_C_P<3> AE2 DDI2_TXP[3] DDI2_AUX_P AD3 DP_X_SNK1_AUXCH_C_P BI 25 DDI3_AUX_N AG7 NC DISPLAY SIDEBANDS DDI3_AUX_P AG6 NC 27 4 IN UPC_XB_FAULT_L CK9 GPP_E12_USB2_OC3* GPP_E7/CPU_GP1 CN3 XDP_PCH_OBSDATA_A3 OUT 16 C 25 IN DP_X_SNK0_HPD CN6 GPP_E13/DDPB_HPD0 GPP_E8/SATALED* CN7 XDP_PCH_OBSDATA_B0 OUT 16 87 83 73 9 7 PPVCCIO_S0_CPU PLACE_NEAR=U0500.AM6:15.24MM DP_X_SNK1_HPD CM6 GPP_E14/DDPC_HPD1 GPP_E9/USB2_OC0* CK6 XDP_USB_EXTC_OC_L 4 CP7 GPP_E15/DPPD_HPD2 GPP_E10/USB2_OC1* CK5 XDP_USB_EXTD_OC_L 4 1 R0530 25 IN 18 TEST_NOA_N_10 GPP_E11/USB2_OC2* CK8 UPC_XA_FAULT_L 43 4 IN CP6 GPP_E16/DPPE_HPD3 IN 4 27 24.9 CM7 GPP_E17/EDP_HPD EDP_BKLTEN CK11 EDP_BKLT_EN 18 TEST_NOA_N_11 EDP_BKLTCTL CH11 EDP_BKLT_PWM 1% 1/20W XDP_DP_INT_HPD OUT 4 75 83 MF OUT 4 76 83 2 201 EDP_COMP AM6 DISP_RCOMP EDP_VDDEN CG11 EDP_PANEL_PWR_EN OUT 4 76 83 B NC AL2 RSVD U0500 RSVD CR3 NC B NC AN2 RSVD CFL-U RSVD CR4 NC 4+3E BGA SYM 20 OF 20 SPARE OMIT_TABLE NC AN4 RSVD RSVD CR35 NC NC AT3 RSVD RSVD CP3 NC NC AU3 RSVD RSVD G1 NC NC H4 RSVD RSVD G2 NC NC BV25 RSVD RSVD H3 NC NC CG1 RSVD RSVD W3 NC NC CG2 RSVD RSVD Y3 NC NC AL1 RSVD RSVD BB24 NC NC AL3 RSVD RSVD BC24 NC NC AL4 RSVD RSVD BC28 NC NC AM3 RSVD RSVD BK35 NC NC AM4 RSVD RSVD BK36 NC NC AN1 RSVD RSVD BT8 NC NC AN3 RSVD RSVD BT9 NC NC AY9 RSVD RSVD BV24 NC NC BB9 RSVD RSVD BP8 NC PP3V3_S5 5 7 11 12 13 14 18 42 43 47 69 RSVD BP9 NC 71 73 74 83 89 R0550 100K 1 2 UPC_XA_FAULT_L 4 27 R0551 100K 1 2 5% 1/20W MF 201 UPC_XB_FAULT_L 4 27 R0552 100K 1 2 5% 1/20W MF 201 XDP_USB_EXTC_OC_L 4 R0553 100K 1 2 5% 1/20W MF 201 XDP_USB_EXTD_OC_L 4 5% 1/20W MF 201 A R0557 100K 1 2 XDP_DP_INT_HPD 4 43 A 5% 1/20W MF 201 SYNC_MASTER= SYNC_DATE= R0540 100K 1 2 EDP_BKLT_EN 4 75 83 PAGE TITLE 5% 1/20W MF 201 CPU GFX R0541 100K 1 2 EDP_BKLT_PWM 4 76 83 5% 1/20W MF 201 DRAWING NUMBER SIZE R0542 100K 1 2 EDP_PANEL_PWR_EN 4 76 83 051-05309 D 5% 1/20W MF 201 Apple Inc. NOTICE OF PROPRIETARY PROPERTY: REVISION THE INFORMATION CONTAINED HEREIN IS THE 6.0.0 PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: BRANCH I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE pvt II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART PAGE BOM_COST_GROUP=CPU & CHIPSET IV ALL RIGHTS RESERVED 5 OF 500 SHEET 4 OF 98 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 D C PP3V3_S5 47 43 42 18 14 13 12 11 7 4 DBGLED DBGLED B A 89 83 74 73 71 69 8 TP0600 1 R0690 R0691 1 1 A 750K 1K TP-P5 1% 5% 1/20W 1/20W PLACE_SIDE=BOTTOM MF 2 201 MF PLACE_NEAR=DS0601.A:13MM 201 2 CATERR_LED_G CATERR_LED_A 83 71 16 9 7 PP1V_S0SW PP1V_S3 83 70 69 65 42 18 17 9 7 PLACE_NEAR=U7800.L6:13MM D3 DBGLED DS0601 CRITICAL PLACE_NEAR=U0500.BJ1:25MM A VALUE=GRN-90MCD-5MA-2.85V PLACE_SIDE=BOTTOM PLACE_NEAR=R0611:1MM R0612 1 1 R0614 VER-1 Q0601 SILK_PART=CATERR R0610 1 1K 49.9 U0500 SSM6N15AFEAP 0402 1K 5% 1% SOT563 K DBGLED 1/20W 1/20W CATERR_LED_K 5% MF MF CFL-U 5G S4 DBGLED D 1/20W 2 201 4+3E CRITICAL 201 2 D6 MF CPU_CATERR_L BGA PLACE_NEAR=U4750.4:13MM AA4 CATERR* 201 2 AR1 PECI SYM 4 OF 20 R0613 1 2 43 5% 1/20W MF 201 83 72 OUT Q0601 CPU_PECI R0611 2 1 300 5% 1/20W MF 201 Y4 PROCHOT* OMIT_TABLE 42 BI CPU_PECI_R VER-1 SSM6N15AFEAP 42 BI CPU_PROCHOT_L 83 CPU_PROCHOT_R_L SOT563 PLACE_NEAR=U0500.Y4:38MM 85 83 72 17 OUT PM_THRMTRIP_L BJ1 THRMTRIP* PROC_TCK T6 XDP_CPU_TCK PROC_TDI U6 XDP_CPU_TDI E1 SKTOCC* IN 16 2G S1 IN 16 NC 84 BI XDP_BPM_L<0> U1 BPM[0]* PROC_TDO Y5 XDP_CPU_TDO OUT 16 NC_XDP_BPM_L<1> U2 BPM[1]* CPU MISC PROC_TMS T5 XDP_CPU_TMS IN 16 JTAG NC_XDP_BPM_L<2> U3 BPM[2]* PROC_TRST* AB6 XDP_CPU_TRST_L IN 16 NC_XDP_BPM_L<3> U4 BPM[3]* PCH_TCK W6 XDP_PCH_TCK IN 16 PCH_TDI U5 XDP_PCH_TDI IN 16 PCH_TDO W5 XDP_PCH_TDO OUT 16 PCH_TMS P5 XDP_PCH_TMS IN 16 PCH_TRST* Y6 XDP_PCH_TRST_L IN 16 PROC_POPIRCOMP BP27 PROC_POPIRCOMP PCH_JTAGX P6 PCH_JTAGX BI 16 PCH_OPIRCOMP BW25 PCH_OPIRCOMP OPCE_RCOMP L5 OPCE_RCOMP OPC_RCOMP N5 OPC_RCOMP R0681 1 R0682 1 R0683 1 R0684 1 49.9 49.9 49.9 49.9 1% 1% 1% 1% 1/20W 1/20W 1/20W 1/20W MF MF MF MF 201 2 201 2 201 2 201 2 PLACE_NEAR=U0500.BP27:12.7MM C PLACE_NEAR=U0500.BW25:12.7MM PLACE_NEAR=U0500.L5:12.7MM PLACE_NEAR=U0500.N5:12.7MM U0500 CFL-U 4+3E BGA 16 BI CPU_CFG<0> T4 CFG[0] SYM 19 OF 20 RSVD_TP B35 NC_CPU_B35 16 BI CPU_CFG<1> CPU_CFG<2> (IPU) BI CPU_CFG<3> 16 BI R4 CFG[1] (IPU) RESERVED RSVD_TP A34 NC_CPU_A34 CPU_CFG<5> 16 BI CPU_CFG<6> T3 CFG[2] (IPU) OMIT_TABLE 16 BI CPU_CFG<7> R3 CFG[3] (IPU) CFG<4> :EDP ENABLE/DISABLE: 1 = DISABLED 0 = ENABLED 16 BI CPU_CFG<8> J4 CFG[4] (IPU) RSVD_TP BJ34 TEST_CPU_BJ34 18 16 BI CPU_CFG<9> RSVD_TP D34 TEST_CPU_D34 18 CPU_CFG<4> 16 BI CPU_CFG<10> 16 BI 16 BI CPU_CFG<11> EDP_ENABLE 16 BI CPU_CFG<12> 16 BI CPU_CFG<13> M4 CFG[5] (IPU) R0634 1 16 BI CPU_CFG<14> 16 BI CPU_CFG<15> J3 CFG[6] (IPU) 1K 16 BI M3 CFG[7] (IPU) 5% 1/20W R2 CFG[8] (IPU) MF N2 CFG[9] (IPU) 201 2 R1 CFG[10] (IPU) N1 CFG[11] (IPU) J2 CFG[12] (IPU) L2 CFG[13] (IPU) J1 CFG[14] (IPU) L1 CFG[15] (IPU) 16 BI CPU_CFG<16> L3 CFG[16] (IPU) B 16 BI CPU_CFG<17> L4 CFG[17] (IPU) 16 BI CPU_CFG<18> N3 CFG[18] (IPU) 16 BI CPU_CFG<19> N4 CFG[19] (IPU) PLACE_NEAR=U0500.AB5:13MM CPU_CFG_RCOMP AB5 CFG_RCOMP TP BP36 NC_CPU_BP36 16 OUT ITP_PMODE W4 ITP_PMODE R0680 1 TP BP35 NC_CPU_BP35 18 TEST_CPU_A35 A35 RSVD_TP TP BR18 NC_CPU_BR18 49.9 1% 1/20W MF 201 2 TP1 BP34 NC_CPU_BP34 TP BK34 NC_CPU_BK34 ZVM* AH26 CPU_ZVM_L OUT 69 CONNECT TO OPC VRS RSVD_TP F34 RSVD_TP CN36 TEST_CPU_F34 18 TEST_CPU_CN36 18 MSM* AJ27 UFS_RESET* AR3 NC_CPU_MSM_L CONNECT TO EOPIO VRS. Not used with combined VR for OPC/EOPIO INPUT3VSEL BT27 18 TEST_CPU_F37 F37 RSVD_TP NC 18 TEST_CPU_BJ36 BJ36 RSVD_TP IST_TRIG CP36 CPU_INPUT3VSEL CPU_IST_TRIG A TP0630 SYNC_MASTER= SYNC_DATE= 1 NOSTUFF A PAGE TITLE SIZE 1 R0632 TP-P5 1 R0631 CPU MISC/JTAG/CFG/RSVD D 0 PLACE_SIDE=BOTTOM 47K 5% For iFDIM test 1/20W 5% Apple Inc. DRAWING NUMBER MF 1/20W 2 0201 MF 051-05309 2 201 REVISION 6.0.0 NOTICE OF PROPRIETARY PROPERTY: BRANCH THE INFORMATION CONTAINED HEREIN IS THE pvt PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: PAGE I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE 6 OF 500 II NOT TO REPRODUCE OR COPY IT SHEET III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART 5 OF 98 BOM_COST_GROUP=CPU & CHIPSET IV ALL RIGHTS RESERVED 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 U0500 U0500 D D CFL-U CFL-U 4+3E 4+3E BGA BGA 20 BI MEM_A_DQ<0> A26 DDR0_DQ[0] SYM 2 OF 20 DDR0_CKP[0] V31 MEM_A_CLK_P<0> MEM_B_DQ<0> AN35 DDR1_DQ[0] SYM 3 OF 20 DDR1_CKP[0] AF29 MEM_B_CLK_P<0> MEM_B_DQ<1> AN34 DDR1_DQ[1] DDR1_CKN[0] AF28 MEM_B_CLK_N<0> OUT 20 24 22 BI MEM_B_DQ<2> AR35 DDR1_DQ[2] DDR1_CKP[1] AE29 MEM_B_CLK_P<1> OUT 22 24 22 BI MEM_B_DQ<3> AR34 DDR1_DQ[3] DDR1_CKN[1] AE28 MEM_B_CLK_N<1> OUT 22 24 20 BI MEM_A_DQ<1> D26 DDR0_DQ[1] DDR0_CKN[0] V32 MEM_A_CLK_N<0> OUT 20 24 22 BI MEM_B_DQ<4> AN37 DDR1_DQ[4] OUT 23 24 22 BI MEM_B_DQ<5> AN36 DDR1_DQ[5] OUT 23 24 20 BI MEM_A_DQ<2> D28 DDR0_DQ[2] DDR0_CKP[1] T31 MEM_A_CLK_P<1> OUT 21 24 22 BI MEM_B_DQ<6> AR36 DDR1_DQ[6] 22 BI MEM_B_DQ<7> AR37 DDR1_DQ[7] C28 DDR0_DQ[3] DDR0_CKN[1] T32 22 BI MEM_B_DQ<8> AU35 DDR1_DQ[8] 20 BI MEM_A_DQ<3> LPDDR3 NON-INTERLEAVED0 MEM_A_CLK_N<1> OUT 21 24 22 BI MEM_B_DQ<9> AU34 DDR1_DQ[9] LPDDR3 NON-INTERLEAVED22 BIMEM_B_DQ<10>AW35DDR1_DQ[10] 20 BI MEM_A_DQ<4> B26 DDR0_DQ[4] 22 BI MEM_B_DQ<11> AW34 DDR1_DQ[11] 22 BI MEM_B_DQ<12> AU37 DDR1_DQ[12] 20 BI MEM_A_DQ<5> C26 DDR0_DQ[5] DDR0_CKE[0] U36 MEM_A_CKE<0> OUT 20 24 22 BI MEM_B_DQ<13> AU36 DDR1_DQ[13] DDR1_CKE[0] T28 MEM_B_CKE<0> OUT 22 24 22 BI MEM_B_DQ<14> AW36 DDR1_DQ[14] DDR1_CKE[1] T29 MEM_B_CKE<1> OUT 22 24 20 BI MEM_A_DQ<6> B28 DDR0_DQ[6] DDR0_CKE[1] U37 MEM_A_CKE<1> OUT 20 24 22 BI MEM_B_DQ<15> AW37 DDR1_DQ[15] DDR1_CKE[2] V28 MEM_B_CKE<2> OUT 23 24 22 BI MEM_B_DQ<16> AJ29 DDR1_DQ[16] DDR1_CKE[3] V29 MEM_B_CKE<3> OUT 23 24 20 BI MEM_A_DQ<7> A28 DDR0_DQ[7] DDR0_CKE[2] U34 MEM_A_CKE<2> OUT 21 24 22 BI MEM_B_DQ<17> AJ30 DDR1_DQ[17] 23 BI MEM_B_DQ<18> AM32 DDR1_DQ[18] 20 BI MEM_A_DQ<8> B30 DDR0_DQ[8] DDR0_CKE[3] U35 MEM_A_CKE<3> OUT 21 24 23 BI MEM_B_DQ<19> AM31 DDR1_DQ[19] 23 BI MEM_B_DQ<20> AM30 DDR1_DQ[20] 20 BI MEM_A_DQ<9> D30 DDR0_DQ[9] 23 BI MEM_B_DQ<21> AM29 DDR1_DQ[21] 23 BI MEM_B_DQ<22> AJ31 DDR1_DQ[22] 20 BI MEM_A_DQ<10> B33 DDR0_DQ[10] DDR0_CS*[0] AE32 MEM_A_CS_L<0> OUT 20 21 24 23 BI MEM_B_DQ<23> AJ32 DDR1_DQ[23] DDR1_CS*[0] AL37 MEM_B_CS_L<0> OUT 22 23 24 23 BI MEM_B_DQ<24> AR31 DDR1_DQ[24] DDR1_CS*[1] AL35 MEM_B_CS_L<1> OUT 22 23 24 20 BI MEM_A_DQ<11> D32 DDR0_DQ[11] DDR0_CS*[1] AF32 MEM_A_CS_L<1> OUT 20 21 24 23 BI MEM_B_DQ<25> AR32 DDR1_DQ[25] OMIT_TABLE 23 BI MEM_B_DQ<26> AV30 DDR1_DQ[26] DDR1_ODT[0] AL36 MEM_B_ODT<0> 20 BI MEM_A_DQ<12> A30 DDR0_DQ[12] OMIT_TABLE 23 BI MEM_B_DQ<27> AV29 DDR1_DQ[27] NC/DDR1_ODT[1] AL34 NC 23 BI MEM_B_DQ<28> AR30 DDR1_DQ[28] 20 BI MEM_A_DQ<13> C30 DDR0_DQ[13] DDR0_ODT[0] AE31 MEM_A_ODT<0> OUT 20 21 24 23 BI MEM_B_DQ<29> AR29 DDR1_DQ[29] OUT 22 23 24 23 BI MEM_B_DQ<30> AV32 DDR1_DQ[30] 20 BI MEM_A_DQ<14> B32 DDR0_DQ[14] NC/DDR0_ODT[1] AF31 NC 23 BI MEM_B_DQ<31> AV31 DDR1_DQ[31] 23 BI MEM_B_DQ<32> BA35 DDR1_DQ[32] 20 BI MEM_A_DQ<15> C32 DDR0_DQ[15] 23 BI MEM_B_DQ<33> BA34 DDR1_DQ[33] 22 BI MEM_B_DQ<34> BC35 DDR1_DQ[34] 21 BI MEM_A_DQ<16> J22 DDR0_DQ[16] DDR0_CAA[0] AB35 MEM_A_CAA<0> OUT 20 24 22 BI MEM_B_DQ<35> BC34 DDR1_DQ[35] DDR1_CAA[0] AF35 MEM_B_CAA<0> OUT 22 24 22 BI MEM_B_DQ<36> BA37 DDR1_DQ[36] DDR1_CAA[1] AB29 MEM_B_CAA<1> OUT 22 24 21 BI MEM_A_DQ<17> H25 DDR0_DQ[17] DDR0_CAA[1] W36 MEM_A_CAA<1> OUT 20 24 22 BI MEM_B_DQ<37> BA36 DDR1_DQ[37] DDR1_CAA[2] AE37 MEM_B_CAA<2> OUT 22 24 22 BI MEM_B_DQ<38> BC36 DDR1_DQ[38] DDR1_CAA[3] AE36 MEM_B_CAA<3> OUT 22 24 21 BI MEM_A_DQ<18> G22 DDR0_DQ[18] DDR0_CAA[2] AA37 MEM_A_CAA<2> OUT 20 24 22 BI MEM_B_DQ<39> BC37 DDR1_DQ[39] DDR1_CAA[4] AC29 MEM_B_CAA<4> OUT 22 24 22 BI MEM_B_DQ<40> BE35 DDR1_DQ[40] DDR1_CAA[5] W29 MEM_B_CAA<5> OUT 22 24 21 BI MEM_A_DQ<19> H22 DDR0_DQ[19] DDR0_CAA[3] AB34 MEM_A_CAA<3> OUT 20 24 22 BI MEM_B_DQ<41> BE34 DDR1_DQ[41] DDR1_CAA[6] AB28 MEM_B_CAA<6> OUT 22 24 22 BI MEM_B_DQ<42> BG35 DDR1_DQ[42] DDR1_CAA[7] AC28 MEM_B_CAA<7> OUT 22 24 21 BI MEM_A_DQ<20> F25 DDR0_DQ[20] DDR0_CAA[4] AA36 MEM_A_CAA<4> OUT 20 24 22 BI MEM_B_DQ<43> BG34 DDR1_DQ[43] DDR1_CAA[8] W28 MEM_B_CAA<8> OUT 22 24 22 BI MEM_B_DQ<44> BE37 DDR1_DQ[44] DDR1_CAA[9] Y28 MEM_B_CAA<9> OUT 22 24 21 BI MEM_A_DQ<21> J25 DDR0_DQ[21] DDR0_CAA[5] V34 MEM_A_CAA<5> OUT 20 24 22 BI MEM_B_DQ<45> BE36 DDR1_DQ[45] 22 BI MEM_B_DQ<46> BG36 DDR1_DQ[46] 21 BI MEM_A_DQ<22> G25 DDR0_DQ[22] DDR0_CAA[6] AA34 MEM_A_CAA<6> OUT 20 24 22 BI MEM_B_DQ<47> BG37 DDR1_DQ[47] 22 BI MEM_B_DQ<48> BA32 DDR1_DQ[48] 21 BI MEM_A_DQ<23> F22 DDR0_DQ[23] DDR0_CAA[7] W34 MEM_A_CAA<7> OUT 20 24 22 BI MEM_B_DQ<49> BA31 DDR1_DQ[49] 23 BI MEM_B_DQ<50> BD31 DDR1_DQ[50] C 21 BI MEM_A_DQ<24> D22 DDR0_DQ[24] DDR0_CAA[8] V35 MEM_A_CAA<8> OUT 20 24 23 BI MEM_B_DQ<51> BD32 DDR1_DQ[51] C 23 BI MEM_B_DQ<52> BA30 DDR1_DQ[52] 21 BI MEM_A_DQ<25> C22 DDR0_DQ[25] DDR0_CAA[9] W35 MEM_A_CAA<9> OUT 20 24 23 BI MEM_B_DQ<53> BA29 DDR1_DQ[53] 23 BI MEM_B_DQ<54> BD29 DDR1_DQ[54] 21 BI MEM_A_DQ<26> C24 DDR0_DQ[26] 23 BI MEM_B_DQ<55> BD30 DDR1_DQ[55] 23 BI MEM_B_DQ<56> BG31 DDR1_DQ[56] 21 BI MEM_A_DQ<27> D24 DDR0_DQ[27] DDR0_CAB[0] AC32 MEM_A_CAB<0> OUT 21 24 23 BI MEM_B_DQ<57> BG32 DDR1_DQ[57] DDR1_CAB[0] AK35 MEM_B_CAB<0> OUT 23 24 23 BI MEM_B_DQ<58> BK32 DDR1_DQ[58] DDR1_CAB[1] AK34 MEM_B_CAB<1> OUT 23 24 21 BI MEM_A_DQ<28> A22 DDR0_DQ[28] DDR0_CAB[1] AB32 MEM_A_CAB<1> OUT 21 24 23 BI MEM_B_DQ<59> BK31 DDR1_DQ[59] DDR1_CAB[2] AJ35 MEM_B_CAB<2> OUT 23 24 23 BI MEM_B_DQ<60> BG29 DDR1_DQ[60] DDR1_CAB[3] AJ34 MEM_B_CAB<3> OUT 23 24 21 BI MEM_A_DQ<29> B22 DDR0_DQ[29] DDR0_CAB[2] AC31 MEM_A_CAB<2> OUT 21 24 23 BI MEM_B_DQ<61> BG30 DDR1_DQ[61] DDR1_CAB[4] AJ37 MEM_B_CAB<4> OUT 23 24 23 BI MEM_B_DQ<62> BK30 DDR1_DQ[62] DDR1_CAB[5] AF34 MEM_B_CAB<5> OUT 23 24 21 BI MEM_A_DQ<30> A24 DDR0_DQ[30] DDR0_CAB[3] Y32 MEM_A_CAB<3> OUT 21 24 23 BI MEM_B_DQ<63> BK29 DDR1_DQ[63] DDR1_CAB[6] AJ36 MEM_B_CAB<6> OUT 23 24 23 BI DDR1_CAB[7] AG34 MEM_B_CAB<7> OUT 23 24 21 BI MEM_A_DQ<31> B24 DDR0_DQ[31] DDR0_CAB[4] W32 MEM_A_CAB<4> OUT 21 24 23 BI DDR1_CAB[8] AG35 MEM_B_CAB<8> OUT 23 24 DDR1_CAB[9] AG36 MEM_B_CAB<9> OUT 23 24 20 BI MEM_A_DQ<32> H37 DDR0_DQ[32] DDR0_CAB[5] AC34 MEM_A_CAB<5> OUT 21 24 20 BI MEM_A_DQ<33> H34 DDR0_DQ[33] DDR0_CAB[6] AB31 MEM_A_CAB<6> OUT 21 24 20 BI MEM_A_DQ<34> K34 DDR0_DQ[34] DDR0_CAB[7] Y31 MEM_A_CAB<7> OUT 21 24 20 BI MEM_A_DQ<35> K35 DDR0_DQ[35] DDR0_CAB[8] AC36 MEM_A_CAB<8> OUT 21 24 20 BI MEM_A_DQ<36> H36 DDR0_DQ[36] DDR0_CAB[9] AC37 MEM_A_CAB<9> OUT 21 24 20 BI MEM_A_DQ<37> H35 DDR0_DQ[37] DDR0_DQSN[0] C27 MEM_A_DQS_N<0> BI 20 DDR1_DQSN[0] AP35 MEM_B_DQS_N<0> BI 22 20 BI MEM_A_DQ<38> K36 DDR0_DQ[38] DDR0_DQSN[1] D31 MEM_A_DQS_N<1> BI 20 DDR1_DQSN[1] AV34 MEM_B_DQS_N<1> BI 22 20 BI MEM_A_DQ<39> K37 DDR0_DQ[39] DDR0_DQSN[2] H24 MEM_A_DQS_N<2> BI 21 DDR1_DQSN[2] AL31 MEM_B_DQS_N<2> BI 23 20 BI MEM_A_DQ<40> N36 DDR0_DQ[40] DDR0_DQSN[3] C23 MEM_A_DQS_N<3> BI 21 DDR1_DQSN[3] AU31 MEM_B_DQS_N<3> BI 23 20 BI MEM_A_DQ<41> N34 DDR0_DQ[41] DDR0_DQSN[4] J35 MEM_A_DQS_N<4> BI 20 DDR1_DQSN[4] BB35 MEM_B_DQS_N<4> BI 22 20 BI MEM_A_DQ<42> R37 DDR0_DQ[42] DDR0_DQSN[5] P34 MEM_A_DQS_N<5> BI 20 DDR1_DQSN[5] BF34 MEM_B_DQS_N<5> BI 22 20 BI MEM_A_DQ<43> R34 DDR0_DQ[43] DDR0_DQSN[6] G30 MEM_A_DQS_N<6> BI 21 DDR1_DQSN[6] BC31 MEM_B_DQS_N<6> BI 23 20 BI MEM_A_DQ<44> N37 DDR0_DQ[44] DDR0_DQSN[7] L30 MEM_A_DQS_N<7> BI 21 DDR1_DQSN[7] BH31 MEM_B_DQS_N<7> BI 23 20 BI MEM_A_DQ<45> N35 DDR0_DQ[45] 20 BI MEM_A_DQ<46> R36 DDR0_DQ[46] DDR0_DQSP[0] D27 MEM_A_DQS_P<0> BI 20 DDR1_DQSP[0] AP34 MEM_B_DQS_P<0> BI 22 DDR1_DQSP[1] AV35 MEM_B_DQS_P<1> BI 22 20 BI MEM_A_DQ<47> R35 DDR0_DQ[47] DDR0_DQSP[1] C31 MEM_A_DQS_P<1> BI 20 DDR1_DQSP[2] AL30 MEM_B_DQS_P<2> BI 23 DDR1_DQSP[3] AU30 MEM_B_DQS_P<3> BI 23 21 BI MEM_A_DQ<48> G31 DDR0_DQ[48] DDR0_DQSP[2] G24 MEM_A_DQS_P<2> BI 21 DDR1_DQSP[4] BB34 MEM_B_DQS_P<4> BI 22 DDR1_DQSP[5] BF35
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