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8 7 6 5 4 3 2 1 1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%. REV ECN CK 2. ALL CAPACITANCE VALUES ARE IN MICROFARADS. DESCRIPTION OF REVISION APPD 3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ. DATE J44 MLB-4GB SCHEMATIC <REV> <ECN> <ECO_DESCRIPTION> <ECODATE> 08/20/2013 D (.csa) Date (.csa) Date D C B Page Contents Sync Page Contents Sync TABLE_TABLEOFCONTENTS_HEAD 1 Table of Contents 01/13/2012 TABLE_TABLEOFCONTENTS_HEAD 62 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 2 BOM Configuration TABLE_TABLEOFCONTENTS_ITEM 1 3 BOM Configuration D2_KEPLER 46 AUDIO:CODEC, ANALOG J44 TABLE_TABLEOFCONTENTS_ITEM 2 4 PD Parts AUDIO:CODEC, DIGITAL TABLE_TABLEOFCONTENTS_ITEM 3 5 CPU GFX/NCTF/RSVD 08/20/2013 TABLE_TABLEOFCONTENTS_ITEM 63 AUDIO: SPEAKER AMP 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 4 6 CPU Misc/JTAG/CFG/RSVD AUDIO: JACK TABLE_TABLEOFCONTENTS_ITEM 5 7 CPU DDR3/LPDDR3 Interfaces J44 47 AUDIO: JACK TRANSLATORS J44 TABLE_TABLEOFCONTENTS_ITEM 6 8 CPU/PCH POWER DC-In & Battery Connectors TABLE_TABLEOFCONTENTS_ITEM 7 9 CPU/PCH GROUNDS 01/03/2013 TABLE_TABLEOFCONTENTS_ITEM 64 PBus Supply & Battery Charger 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 8 10 CPU Decoupling CPU VR12.6 VCC Regulator IC TABLE_TABLEOFCONTENTS_ITEM 9 12 PCH Decoupling J44 48 J44 TABLE_TABLEOFCONTENTS_ITEM 10 13 PCH Audio/JTAG/SATA/CLK m CPU VR12.5 VCC Power Stage TABLE_TABLEOFCONTENTS_ITEM 11 14 PCH PM/PCI/GFX 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 65 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 12 15 PCH PCIe/USB/LPC/SPI/SMBus 1.35V DDR3 SUPPLY TABLE_TABLEOFCONTENTS_ITEM 13 16 PCH GPIO/MISC/LPIO J44 49 5V / 3.3V Power Supply J44 TABLE_TABLEOFCONTENTS_ITEM 14 18 CPU/PCH Merged XDP TABLE_TABLEOFCONTENTS_ITEM 15 19 Chipset Support 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 66 o 1.05V S0 Power Supply 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 16 20 Project Chipset Support TABLE_TABLEOFCONTENTS_ITEM 17 22 DDR3 VREF MARGINING J44 50 LCD AND KBD BKLT DRIVER J44 TABLE_TABLEOFCONTENTS_ITEM 18 23 DDR3 SDRAM Bank A (Rank 0) TABLE_TABLEOFCONTENTS_ITEM 19 25 DDR3 SDRAM BANK B (RANK 0) 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 70 c Misc Power Supplies 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 20 27 DDR3 Termination TABLE_TABLEOFCONTENTS_ITEM 21 28 Thunderbolt Host (1 of 2) J44 51 Power FETs J44 TABLE_TABLEOFCONTENTS_ITEM 22 29 Thunderbolt Host (2 of 2) TABLE_TABLEOFCONTENTS_ITEM 23 30 Thunderbolt Mobile Support 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 71 . Power Control 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 24 32 Thunderbolt Connector A TABLE_TABLEOFCONTENTS_ITEM 25 33 Thunderbolt Connector B J44 52 eDP Display Connector J44 TABLE_TABLEOFCONTENTS_ITEM 26 34 DDC Crossbar RIO Connector TABLE_TABLEOFCONTENTS_ITEM 27 35 WIRELESS SUPPORT 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 72 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 28 37 SSD Connector xDisplay Mux: HDMI vs DP TABLE_TABLEOFCONTENTS_ITEM 29 39 Camera 1 of 2 J44 53 J44 TABLE_TABLEOFCONTENTS_ITEM 30 40 Camera 2 of 2 Power Aliases TABLE_TABLEOFCONTENTS_ITEM 31 46 External A USB3 Connector 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 73 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 32 48 KEYBOARD/TRACKPAD (1 OF 2) iSignal Aliases TABLE_TABLEOFCONTENTS_ITEM 33 49 KEYBOARD/TRACKPAD (2 OF 2) J44 54 fMemory Bit/Byte Swizzle J44 TABLE_TABLEOFCONTENTS_ITEM 34 50 SMC TABLE_TABLEOFCONTENTS_ITEM 35 51 SMC Shared Support 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 74 Functional / ICT Test 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 36 52 SMC Project Support PCB Rule Definitions TABLE_TABLEOFCONTENTS_ITEM 37 53 SMBus Connections J44 55 CPU & PCIe Constraints J44 TABLE_TABLEOFCONTENTS_ITEM 38 54 Power Sensors: High Side USB Constraints TABLE_TABLEOFCONTENTS_ITEM 39 55 Power Sensors: Load Side 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 75 PCH Constraints 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 40 56 Power Sensors: Extended Memory Constraints TABLE_TABLEOFCONTENTS_ITEM 41 58 Thermal Sensors J44 56 TBT,DP,HDMI Constraints J44 TABLE_TABLEOFCONTENTS_ITEM 42 60 Camera Constraints TABLE_TABLEOFCONTENTS_ITEM 43 61 w Fan 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 76 SMC Constraints 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 44 w LPC+SPI Debug Connector Project Specific Constraints 45 J44 57 Reference J44 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 77 08/12/2013 J44 58 J44 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 78 08/12/2013 J44 59 J44 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 80 08/12/2013 J44 60 J44 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 81 08/12/2013 J44 61 J44 C 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 83 08/12/2013 J44 62 J44 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 95 08/12/2013 J44 63 J44 08/12/2013 TABLE_TABLEOFCONTENTS_ITEM 97 08/12/2013 J44 64 J44 MASTER TABLE_TABLEOFCONTENTS_ITEM 100 08/12/2013 MASTER 65 J44 MASTER TABLE_TABLEOFCONTENTS_ITEM 102 MASTER MASTER 66 MASTER 04/02/2013 TABLE_TABLEOFCONTENTS_ITEM 103 01/03/2013 J44_YONAS-4GB 67 TABLE_TABLEOFCONTENTS_ITEM J44 68 104 TABLE_TABLEOFCONTENTS_ITEM 08/12/2013 69 110 TABLE_TABLEOFCONTENTS_ITEM 08/12/2013 J44 7701a111 TABLE_TABLEOFCONTENTS_ITEM J44 08/12/2013 112 TABLE_TABLEOFCONTENTS_ITEM 08/12/2013 J44 n 72 111134 TABLE_TABLEOFCONTENTS_ITEM J44 08/12/2013 08/12/2013 J44 J44 08/12/2013 08/12/2013 J44 J44 08/12/2013 i 08/12/2013 08/12/2013 J44 08/12/2013 J44 J44 08/12/2013 J44 08/12/2013 73 01/03/2013 J44 08/12/2013 J44 J44 J44 h08/12/2013 J44 TABLE_TABLEOFCONTENTS_ITEM 115 08/12/2013 08/12/2013 .J44 74 J44 c08/12/2013 J44 TABLE_TABLEOFCONTENTS_ITEM 116 08/12/2013 J44 75 J44 TABLE_TABLEOFCONTENTS_ITEM 117 08/12/2013 76 J44 TABLE_TABLEOFCONTENTS_ITEM 118 08/12/2013 77 J44 TABLE_TABLEOFCONTENTS_ITEM 120 08/12/2013 78 J44 TABLE_TABLEOFCONTENTS_ITEM B 08/12/2013 08/12/2013 J44 w J44 08/12/2013 J44 08/12/2013 J44 08/12/2013 08/12/2013 J44 08/12/2013 J44 08/12/2013 J44 08/12/2013 J44 08/12/2013 J44 A ALIASES RESOLVED A DRAWING TITLE <PART_DESCRIPTION> DRAWING NUMBER SIZE Apple Inc. <SCH_NUM> D Schematic / PCB #'s R REVISION NOTICE OF PROPRIETARY PROPERTY: <E4LABEL> PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION THE INFORMATION CONTAINED HEREIN IS THE BRANCH SCHEM,MLB-4GB,J44 SCH CRITICAL PROPRIETARY PROPERTY OF APPLE INC. PCBF,MLB-4GB,J44 PCB CRITICAL THE POSESSOR AGREES TO THE FOLLOWING: <BRANCH> 051-0052 1 I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE PAGE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART 1 OF 120 IV ALL RIGHTS RESERVED 820-3536 1 SHEET 1 OF 78 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 BOM Groups TABLE_BOMGROUP_HEAD BOM GROUP BOM OPTIONS TABLE_BOMGROUP_ITEM J44_COMMON ALTERNATE,COMMON,J44_COMMON1,J44_COMMON2,J44_COMMON3,J44_COMMON4,J44_PROGPARTS TABLE_BOMGROUP_ITEM J44_COMMON1 TBTHV:P15V,SKIP_5V3V3:AUDIBLE,SPI:DUAL_IO TABLE_BOMGROUP_ITEM J44_COMMON2 EDP,EDP_LS_CAP,CAMERA_3V3:S0,CAM_WAKE:NO,CAM_XTAL:NO,MEM_ODT:PU,VCORE_FETS D TABLE_BOMGROUP_ITEM D J44_COMMON3 XDP,LPCPLUS,BKLT:PROD,CPUTHRM:ALRT,LOADRC:NO,OTHERRC:NO,DDRRC:NO,TBTRC:NO,BMONRC:NO J44_PROGPARTS SMC_PROG:PVT,BOOTROM:PVT,TBTROM:PVT,TPAD_PSOC:PROG TABLE_BOMGROUP_ITEM Programmables (All Builds) ENGISNS LOADISNS,OTHERISNS,DDRISNS,TBTISNS,BMONISNS TABLE_BOMGROUP_ITEM TBT PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION 341S3918 1 EPROM,FALCON RIDGE (V13.7) J44 U2890 CRITICAL TBTROM:PVT SMC o mU5000 341S3922 1 IC,SMC-B1,EXT(V2.16F39),PVT,J44 CRITICAL SMC_PROG:PVT BOOTROM:PVT c EFI ROM TPAD_PSOC:PROG Module Parts . 341S3924 PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION C 337S4596 1 HSWULT,SR18A,PRQ,C0,2.4,28W,2+3,3M,BGA U0500 CRITICAL CPU_HSW:2.4G i x PSOC 1 IC,EFI ROM (V0116),PVT,J44 U6100 CRITICAL C 341S3862 B 337S4597 1 HSWULT,SR189,PRQ,C0,2.6,28W,2+3,3M,BGA U0500 CRITICAL CPU_HSW:2.6G 337S4598 1 HSWULT,SR188,PRQ,C0,2.8,28W,2+3,4M,BGA U0500 CRITICAL CPU_HSW:2.8G 338S1247 1 IC,TBT,FR-4C,A0,PRQ,CIO,SR1JC,FCBGA288 U2800 CRITICAL Altenrnatae Pafrts PART NUMBER ALTERNATE FOR BOM OPTION PART NUMBER 338S1186 1 IC,BCM15700A2,S2 PCIE CAMERA PROCESSOR U3900 CRITICAL i376S1053 376S0604 128S0311 128S0329 376S1194 2 MOSFET,N-CH,30V,15.3A,12M,8P 3.3X3.3 DFN Q7310,Q7320 CRITICAL VCORE_FET:VSHY 1 U4801 CRITICAL h138S0739 138S0706 IC,TRKPD/KYBD PSOC,CU ONLY(V224) J44 376S1193 2 MOSFET,N-CH,30V,22A,6.0M,8P 3.3X3.3 DFN Q7311,Q7321 CRITICAL VCORE_FET:VSHY 376S0964 2 MOSFET,N-CH,25V,30A,9.6M,8P 3.3X3.3 DFN Q7310,Q7320 CRITICAL VCORE_FET:REN 376S1104 2 MOSFET,N-CH,25V,30A,6.1M,8P 3.3X3.3 DFN Q7311,Q7321 CRITICAL VCORE_FET:REN REF DES COMMENTS: TABLE_ALT_HEAD ALL TABLE_ALT_ITEM ALL ALL Diodes alt to Fairchild c 197S0481 197S0480 ALL TABLE_ALT_ITEM B 152S0461 152S1645 ALL NEC alt to Sanyo . 376S1080 376S0820 ALL TABLE_ALT_ITEM 155S0667 155S0583 ALL Samsung alt to Murata 138S0725 138S0724 ALL TABLE_ALT_ITEM Epson alt to NDK TABLE_ALT_ITEM Cyntec alt to Vishay TABLE_ALT_ITEM Diodes alt to On Semi TABLE_ALT_ITEM Panasonic alt to TDK TABLE_ALT_ITEM Samsung alt to Murata w 376S1032 376S0855 ALL TABLE_ALT_ITEM w 376S1129 376S0855 ALL 376S1089 376S1128 ALL Toshiba alt for Diodes Dual 353S3452 353S1286 ALL 376S1180 376S0761 ALL TABLE_ALT_ITEM 128S0364 128S0264 ALL 107S0254 107S0241 ALL NXP Alt for Diodes Dual TABLE_ALT_ITEM NXP Alt for Diodes Single TABLE_ALT_ITEM Maxim alt to Microchip TABLE_ALT_ITEM Renesas alt to Vishay TABLE_ALT_ITEM Sanyo 2nd Factory alt TABLE_ALT_ITEM Cyntec alt to TFT w 138S0843 138S0674 ALL TABLE_ALT_ITEM 138S0803 138S0639 ALL 138S0846 138S0811 ALL Samsung alt to Murata (BKLT) 197S0542 197S0544 ALL TABLE_ALT_ITEM Samsung alt to Murata (BKLT) TABLE_ALT_ITEM Samsung alt to Murata (BKLT) TABLE_ALT_ITEM NDK alt to TXC 197S0545 197S0544 ALL TABLE_ALT_ITEM Epson alt to TXC 152S1876 152S1804 ALL TABLE_ALT_ITEM TDK alt to Toko A 107S0255 107S0240 ALL TABLE_ALT_ITEM SYNC_MASTER=J44 A 107S0250 107S0248 ALL Cyntec alt to TFT SYNC_DATE=08/20/2013 TABLE_ALT_ITEM Cyntec alt to TFT 127S0164 127S0162 ALL TABLE_ALT_ITEM PAGE TITLE Rohm alt to Vishay BOM Configuration 353S4070 353S4069 ALL TABLE_ALT_ITEM DRAWING NUMBER SIZE 353S4068 353S4069 ALL 353S3814 353S3812 ALL Pericom alt to TI DP Mux U9750 Apple Inc. <SCH_NUM> D TABLE_ALT_ITEM R REVISION NXP alt to TI DP Mux U9750 <E4LABEL> TABLE_ALT_ITEM TI alt to NXP 311S0649 311S0541 ALL TABLE_ALT_ITEM NOTICE OF PROPRIETARY PROPERTY: BRANCH 128S0436 128S0392 ALL ONsemi alt to Toshiba THE INFORMATION CONTAINED HEREIN IS THE <BRANCH> PROPRIETARY PROPERTY OF APPLE INC. TABLE_ALT_ITEM THE POSESSOR AGREES TO THE FOLLOWING: PAGE Kemet alt to Sanyo I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE 2 OF 120 II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART SHEET IV ALL RIGHTS RESERVED 2 OF 78 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 BOM Variants DEVELOPMENT/BASE BOM BOM NUMBER BOM NAME BOM OPTIONS TABLE_BOMGROUP_HEAD PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION COMMON,MLB-4GB,J44 J44_COMMON TABLE_BOMGROUP_ITEM J44 MLB COMMON BOM BASE CRITICAL BASE_BOM 685-0054 XDP_CONN TABLE_BOMGROUP_ITEM 685-0054 1 J44 MLB DEVEL BOM DEVEL CRITICAL DEVEL_BOM DEV,MLB-4GB,J44 TABLE_BOMGROUP_ITEM 985-0053 PCBA,MLB-4GB,2.4G,4GB-HYNIX,J44 BASE_BOM,CPU_HSW:2.4G,RAM_4G_HYNIX_H,CAMDRAM:HYNIX_H 985-0053 1 PCBA,MLB-4GB,2.4G,4GB-ELPIDA,J44 639-4878 PCBA,MLB-4GB,2.4G,4GB-MICRON,J44 PCBA,MLB-4GB,2.6G,4GB-HYNIX,J44 PCBA,MLB-4GB,2.6G,4GB-ELPIDA,J44 TABLE_BOMGROUP_ITEM PCBA,MLB-4GB,2.6G,4GB-MICRON,J44 639-4879 PCBA,MLB-4GB,2.8G,4GB-HYNIX,J44 BASE_BOM,CPU_HSW:2.4G,RAM_4G_ELPIDA,CAMDRAM:ELPIDA PCBA,MLB-4GB,2.8G,4GB-ELPIDA,J44 PCBA,MLB-4GB,2.8G,4GB-MICRON,J44 TABLE_BOMGROUP_ITEM 639-4880 VCORE,FET,VSHY,J44 BASE_BOM,CPU_HSW:2.4G,RAM_4G_MICRON,CAMDRAM:MICRON SUB-BOMS VCORE,FET,REN,J44 D TABLE_BOMGROUP_ITEM D C 639-5272 BASE_BOM,CPU_HSW:2.6G,RAM_4G_HYNIX_H,CAMDRAM:HYNIX_H PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION B TABLE_BOMGROUP_ITEM 639-5273 BASE_BOM,CPU_HSW:2.6G,RAM_4G_ELPIDA,CAMDRAM:ELPIDA 685-0074 1 VCORE,FET,VSHY,J44 VCOREFETS CRITICAL VCORE_FETS TABLE_BOMGROUP_ITEM 639-5274 BASE_BOM,CPU_HSW:2.6G,RAM_4G_MICRON,CAMDRAM:MICRON TABLE_BOMGROUP_ITEM 639-5275 BASE_BOM,CPU_HSW:2.8G,RAM_4G_HYNIX_H,CAMDRAM:HYNIX_H Alternate Parts 639-5276 BASE_BOM,CPU_HSW:2.8G,RAM_4G_ELPIDA,CAMDRAM:ELPIDA TABLE_BOMGROUP_ITEM PART NUMBER ALTERNATE FOR BOM OPTION REF DES COMMENTS: TABLE_ALT_HEAD BASE_BOM,CPU_HSW:2.8G,RAM_4G_MICRON,CAMDRAM:MICRON TABLE_BOMGROUP_ITEM PART NUMBER TABLE_ALT_ITEM 639-5277 TABLE_BOMGROUP_ITEM VCORE_FET:VSHY 685-0075 685-0074 ALL VCORE_FET:REN RENESAS ALT TO VISHAY 685-0074 685-0075 TABLE_BOMGROUP_ITEM om . i x . c DRAM SPD Straps DRAM PARTS 8 IC,SDRAM,4GBIT,256MX16,DDR3-1600,F DIE,96FBGA U2300,U2320,U2340,U2360,U2500,U2520,U2540,U2560 CRITICAL 4G_ELPIDA f BOM GROUP 333S0704 333S0700 8 IC,SDRAM,4GBIT,256MX16,DDR3-1600,HUMA,96FBGA U2300,U2320,U2340,U2360,U2500,U2520,U2540,U2560 CRITICAL 4G_HYNIX_H RAM_4G_ELPIDA 333S0698 C RAM_4G_HYNIX_H 333S0715 8 IC,SDRAM,4GBIT,256MX16,DDR3-1600,REV E,96FBGA U2300,U2320,U2340,U2360,U2500,U2520,U2540,U2560 CRITICAL 4G_MICRON RAM_4G_MICRON 333S0717 RAM_4G_ELPIDA_1866 333S0720 8 IC,SDRAM,4GBIT,256MX16,DDR3-1866,F DIE,96FBGA U2300,U2320,U2340,U2360,U2500,U2520,U2540,U2560 CRITICAL 4G_ELPIDA_1866 RAM_4G_HYNIX_H_1866 RAM_4G_MICRON_1866 8 IC,SDRAM,4GBIT,256MX16,DDR3-1866,HUMA,96FBGA U2300,U2320,U2340,U2360,U2500,U2520,U2540,U2560 CRITICAL 4G_HYNIX_H_1866 8 IC,SDRAM,4GBIT,256MX16,DDR3-1866,REV E,96FBGA U2300,U2320,U2340,U2360,U2500,U2520,U2540,U2560 CRITICAL 4G_MICRON_1866 n a BOM OPTIONS TABLE_BOMGROUP_HEAD 4G_ELPIDA,RAMCFG3:L,RAMCFG2:L,RAMCFG1:L,RAMCFG0:L,PPDDR:1V35 TABLE_BOMGROUP_ITEM i 4G_HYNIX_H,RAMCFG3:L,RAMCFG2:L,RAMCFG1:L,RAMCFG0:H,PPDDR:1V35 TABLE_BOMGROUP_ITEM 4G_MICRON,RAMCFG3:L,RAMCFG2:L,RAMCFG1:H,RAMCFG0:L,PPDDR:1V35 TABLE_BOMGROUP_ITEM 4G_ELPIDA_1866,RAMCFG3:L,RAMCFG2:L,RAMCFG1:L,RAMCFG0:L,PPDDR:1V5 TABLE_BOMGROUP_ITEM 4G_HYNIX_H_1866,RAMCFG3:L,RAMCFG2:L,RAMCFG1:L,RAMCFG0:H,PPDDR:1V5 TABLE_BOMGROUP_ITEM 4G_MICRON_1866,RAMCFG3:L,RAMCFG2:L,RAMCFG1:H,RAMCFG0:L,PPDDR:1V5 TABLE_BOMGROUP_ITEM NOTE: 1866 PARTS BEING STRAPPED TO RUN AT 1600 B c h 13" MBP VARIABLE BOM GROUPS BOM OPTIONS TABLE_BOMGROUP_HEAD BOM GROUP SMCBOARDID:8 TABLE_BOMGROUP_ITEM DRAM SPD Straps J44_COMMON4 BOM GROUP w w CAMDRAM:HYNIX_H CAMDRAM:ELPIDA BOM OPTIONS w TABLE_BOMGROUP_HEAD CAMDRAM:MICRON CAMDRAM_TYPE:HYNIX_H TABLE_BOMGROUP_ITEM CAMDRAM_TYPE:ELPIDA TABLE_BOMGROUP_ITEM CAMDRAM_TYPE:MICRON TABLE_BOMGROUP_ITEM A SYNC_MASTER=J44 A SYNC_DATE=01/03/2013 PAGE TITLE DRAM Parts BOM Configuration PART NUMBER QTY DESCRIPTION REFERENCE DES CRITICAL BOM OPTION DRAWING NUMBER SIZE 333S0700 1 IC,SDRAM,4GBIT,DDR3L-1600,HUMA,96B FBGA U4000 CRITICAL CAMDRAM_TYPE:HYNIX_H Apple Inc. <SCH_NUM> D 333S0704 1 IC,SDRAM,4GBIT,DDR3L-1600,DIE F,96B FBGA U4000 CRITICAL CAMDRAM_TYPE:ELPIDA R REVISION NOTICE OF PROPRIETARY PROPERTY: <E4LABEL> 333S0698 1 IC,SDRAM,4GBIT,DDR3L-1600,REV E,96B FBGA U4000 CRITICAL CAMDRAM_TYPE:MICRON THE INFORMATION CONTAINED HEREIN IS THE BRANCH PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: <BRANCH> I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE PAGE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART 3 OF 120 IV ALL RIGHTS RESERVED SHEET 3 OF 78 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 Shield Cans 1 1 SH0451 SH0450 SM SM SHLD-J44-MLB SHLD-J44-MLB-T29 USB Cage TBT Cage D Mounting Holes & Slots D OMIT ABOVE GUMSTICK CARD IN MIDDLE OF BOARD (998-1195) ZT0411 4P5R2P3-3P5B 1 OMIT ZT0413 SNOWMAN-SHAPED SLOT AT LEFT OF MEMORY BANK 6.19X4.60-SNOWMAN (998-5879) .chinafix.com 1 SNOWMAN-SHAPED SLOT AT RIGHT OF MEMORY BANK OMIT (998-5879) ZT0414 6.19X4.60-SNOWMAN 1 TH0400 Upper TBT can Ground slot TH-NSP (862-0118) 1 SL-1.1X0.5-1.4x0.8 C TH0403 Lower TBT can Ground slot C TH-NSP B 1 SL-1.1X0.5-1.4x0.8 (862-0118) TH0404 USB can Ground slot TH-NSP (998-3975) 1 SL-1.1X0.45-1.4x0.75 TH0405 USB can Ground slot TH-NSP (998-3975) 1 SL-1.1X0.45-1.4x0.75 Rubber Mount Standoffs (860-1448) SH0460 SH0461 2.9OD1.2ID-1.35H-SM 2.9OD1.2ID-1.35H-SM 1 1 2 2 B SH0462 SH0465 2.9OD1.2ID-1.35H-SM 2.9OD1.2ID-1.35H-SM 1 1 2 2 w THERMAL MODULE STANDOFF (860-1645) SH0464 SH0463 SH0420 SH0421 SSD STANDOFF (806-5375) FAN STANDOFF (806-5376) wTHERMAL-4.50-J44-SM 2.9OD1.2ID-1.35H-SM 2.9OD1.2ID-1.35H-SM THERMAL-4.50-J44-SM 1 SH0440 SH0441 1 1 1 5.0OD2.0H-SM STDOFF-4.5OD1.73H-SM-1.33-3.2 1 2 2 1 SH0466 SH0467 w SH0426 SH0427 POGO PINS (870-2451) 2.9OD1.2ID-1.35H-SM 2.9OD1.2ID-1.35H-SM THERMAL-4.50-J44-SM THERMAL-4.50-J44-SM SH0435 & SH0436 removed. 1 1 1 1 2 2 SH0432 SH0433 POGO-2.3OD-5.5H-SM-LOW-FORCE POGO-2.3OD-5.5H-SM-LOW-FORCE SM SM 1 1 A RIO FLEX BRACKET BOSSES (860-2354) SYNC_MASTER=J44 A SYNC_DATE=08/12/2013 PAGE TITLE SH0443 SH0444 PD Parts 3.5OD2.0H-SM 3.5OD2.0H-SM DRAWING NUMBER SIZE 1 1 Apple Inc. <SCH_NUM> D R REVISION NOTICE OF PROPRIETARY PROPERTY: <E4LABEL> THE INFORMATION CONTAINED HEREIN IS THE BRANCH PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: <BRANCH> I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE PAGE II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART 4 OF 120 IV ALL RIGHTS RESERVED SHEET 4 OF 78 8 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 D C CRITICAL B OMIT_TABLE A U0500 8 HASWELL-ULT 2C+GT2 BGA-TSP DDI Port Assignments: SYM 1 OF 19 eDP Port Assignment: TBT Sink 0 74 23 OUT DP_TBTSNK0_ML_C_N<0> C54 DDI1_TXN0 EDP_TXN0 C45 DP_INT_ML_C_N<0> OUT 62 74 D TBT Sink 1 (MUXed with HDMI 74 23 OUT DP_TBTSNK0_ML_C_P<0> C55 DDI1_TXP0 EDP_TXP0 B46 DP_INT_ML_C_P<0> OUT 62 74 if necessary) 74 23 OUT DP_TBTSNK0_ML_C_N<1> B58 DDI1_TXN1 EDP_TXN1 A47 DP_INT_ML_C_N<1> OUT 62 74 74 23 OUT DP_TBTSNK0_ML_C_P<1> C58 DDI1_TXP1 EDP_TXP1 B47 DP_INT_ML_C_P<1> OUT 62 74 74 23 OUT DP_TBTSNK0_ML_C_N<2> B55 DDI1_TXN2 EDP_TXN2 C47 DP_INT_ML_C_N<2> Internal panel 74 23 OUT DP_TBTSNK0_ML_C_P<2> A55 DDI1_TXP2 EDP_TXP2 C46 DP_INT_ML_C_P<2> 74 23 OUT DP_TBTSNK0_ML_C_N<3> A57 DDI1_TXN3 DDI EDP_TXN3 A49 DP_INT_ML_C_N<3> OUT 62 74 74 23 OUT DP_TBTSNK0_ML_C_P<3> B57 DDI1_TXP3 EDP EDP_TXP3 B49 DP_INT_ML_C_P<3> OUT 62 74 OUT 62 74 =DP_TBTSNK1_ML_C_N<0> C51 DDI2_TXN0 OUT 62 74 PPVCOMP_S0_CPU 8 66 OUT 66 OUT =DP_TBTSNK1_ML_C_P<0> C50 DDI2_TXP0 1 R0530 66 OUT =DP_TBTSNK1_ML_C_N<1> 66 OUT =DP_TBTSNK1_ML_C_P<1> EDP_AUXN A45 24.9 66 OUT =DP_TBTSNK1_ML_C_N<2> EDP_AUXP B45 66 OUT =DP_TBTSNK1_ML_C_P<2> 1% 66 OUT =DP_TBTSNK1_ML_C_N<3> EDP_RCOMP D20 1/20W 66 OUT =DP_TBTSNK1_ML_C_P<3> EDP_DISP_UTIL A43 MF C53 DDI2_TXN1 2 201 B54 DDI2_TXP1 C49 DDI2_TXN2 B50 DDI2_TXP2 A53 DDI2_TXN3 m B53 DDI2_TXP3 DP_INT_AUXCH_C_N BI 62 74 DP_INT_AUXCH_C_P BI 62 74 70 MCP_EDP_RCOMP TP_EDP_DISP_UTIL . c o NO_TEST x TRUE MCP Daisy-Chain Strategy: TRUE CRITICAL Each corner of CPU has two testpoints. OMIT_TABLE Other corner test signals connected in i TRUE daisy-chain fashion. Continuity should U0500 exist between both TP's on each corner. C TRUE HASWELL-ULT NO_TEST f TRUE 2C+GT2 TRUE BGA-TSP TRUE SYM 17 OF 19 a TRUE 5 MCP_DC_AW2_AY2 AY2 DAISY_CHAIN_NCTF DAISY_CHAIN_NCTF A3 TRUE MCP_DC_A3_B3 5 5 MCP_DC_AW3_AY3 AY3 AY60 DAISY_CHAIN_NCTF DAISY_CHAIN_NCTF A4 MCP_DC_A4 1 TP TP0500 MCP_DC_AY60 AY61 TP0531 TP 1 5 MCP_DC_AW61_AY61 AY62 DAISY_CHAIN_NCTF DAISY_CHAIN_NCTF A60 MCP_DC_A60 TP-P6 TP-P6 5 MCP_DC_AW62_AY62 DAISY_CHAIN_NCTF B2 DAISY_CHAIN_NCTF DAISY_CHAIN_NCTF A61 TRUE MCP_DC_A61_B61 5 1 TP TP0510 TP0501 TP 1 MCP_DC_B2 B3 DAISY_CHAIN_NCTF TP-P6 5 MCP_DC_A3_B3 B61 DAISY_CHAIN_NCTF DAISY_CHAIN_NCTF A62 MCP_DC_A62 TP-P6 5 MCP_DC_A61_B61 B62 DAISY_CHAIN_NCTF B63 DAISY_CHAIN_NCTF DAISY_CHAIN_NCTF AV1 MCP_DC_AV1 1 TP TP0511 MCP_DC_B62_B63 C1 DAISY_CHAIN_NCTF C2 DAISY_CHAIN_NCTF DAISY_CHAIN_NCTF AW1 MCP_DC_AW1 TP-P6 MCP_DC_C1_C2 DAISY_CHAIN_NCTF DAISY_CHAIN_NCTF AW2 TRUE MCP_DC_AW2_AY2 5 1 TP TP0520 DAISY_CHAIN_NCTF AW3 TRUE MCP_DC_AW3_AY3 5 TP-P6 DAISY_CHAIN_NCTF AW61 MCP_DC_AW61_AY61 1 TP TP0521 i nCRITICAL TRUE 5 h OMIT_TABLE TP-P6 DAISY_CHAIN_NCTF AW62 TRUE MCP_DC_AW62_AY62 5 1 TP TP0530 DAISY_CHAIN_NCTF AW63 MCP_DC_AW63 TP-P6 c SYM 18 OF 19 U0500 B NC AT2 RSVD HASWELL-ULT . NC AU44 RSVD 2C+GT2 BGA-TSP SPARE RSVD N23 NC RSVD R23 NC w NC AV44 RSVD RSVD T23 NC NC D15 RSVD RSVD U10 NC NC F22 RSVD RSVD AL1 NC NC H22 RSVD RSVD AM11 NC NC J21 RSVD RSVD AP7 NC w RSVD AU10 NC RSVD AU15 NC RSVD AW14 NC RSVD AY14 NC w SYNC_MASTER=J44 A SYNC_DATE=08/12/2013 PAGE TITLE CPU GFX/NCTF/RSVD Apple Inc. DRAWING NUMBER SIZE R <SCH_NUM> D NOTICE OF PROPRIETARY PROPERTY: REVISION THE INFORMATION CONTAINED HEREIN IS THE <E4LABEL> PROPRIETARY PROPERTY OF APPLE INC. THE POSESSOR AGREES TO THE FOLLOWING: BRANCH I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE <BRANCH> II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART PAGE IV ALL RIGHTS RESERVED 5 OF 120 SHEET 5 OF 78 7 6 5 4 3 2 1 8 7 6 5 4 3 2 1 CRITICAL OMIT_TABLE D U0500 D HASWELL-ULT 2C+GT2 BGA-TSP 61 60 57 53 37 17 16 15 11 8 PP1V05_S0 NC D61 SYM 2 OF 19 (IPU) PRDY* J62 XDP_CPU_PRDY_L OUT 16 70 PROC_DETECT* 68 65 R0610 1 70 36 OUT CPU_CATERR_L K61 CATERR* MISC (IPU) PREQ* K62 XDP_CPU_PREQ_L IN 16 70 70 37 BI CPU_PECI N62 PECI 62 R0611 K63 PROCHOT* (IPD) PROC_TCK E60 XDP_CPU_TCK IN 16 70 70 CPU_PROCHOT_R_L (IPU) PROC_TMS E61 XDP_CPU_TMS IN 16 70 5% 56 (IPU) PROC_TRST* E59 XDP_CPUPCH_TRST_L IN 12 16 70 1/20W 70 53 37 36 BI 2 1 THERMAL MF PWR 201 2 JTAG CPU_PROCHOT_L 5% CPU_PWRGD C61 PROCPWRGD (IPU) PROC_TDI F63 XDP_CPU_TDI IN 16 70 1/20W PROC_TDO F62 XDP_CPU_TDO OUT 16 70 70 CPU_SM_RCOMP<0> MF 70 CPU_SM_RCOMP<1> XDP_BPM_L<0> BI 16 70 201 70 CPU_SM_RCOMP<2> XDP_BPM_L<1> BI 16 70 BI 16 70 66 22 OUT MEM_RESET_HSW_L AU60 SM_RCOMP0 (IPU) BPM0* J60 m XDP_BPM_L<2> BI 16 70 17 OUT CPU_MEMVTT_PWR_EN_LSVDDQ AV60 SM_RCOMP1 (IPU) BPM1* H60 BI 16 70 AU61 SM_RCOMP2 (IPU) BPM2* H61 XDP_BPM_L<3> BI 16 70 (IPU) BPM3* H62 XDP_BPM_L<4> BI 16 70 R0650 1 R0651 1 R0652 1 R0620 1 AV15 SM_DRAMRST* DDR3 (IPU) BPM4* K59 XDP_BPM_L<5> BI 16 70 (IPU) BPM5* H63 200 121 100 10K AV61 SM_PG_CNTL1 (IPU) BPM6* K60 c oXDP_BPM_L<6> (IPU) BPM7* J61 1% 1% 1% 5% XDP_BPM_L<7> 1/20W 1/20W 1/20W 1/20W MF MF MF MF 201 2 201 2 201 2 201 2 PLACE_NEAR=U0500.AU60:12.7mm x. PLACE_NEAR=U0500.AV60:12.7mm PLACE_NEAR=U0500.AU61:12.7mm RSVD_TP AV63 PLACE_NEAR=U0500.C61:12.7mm RSVD_TP AU63 RSVD_TP C63 C C B n aAC60 f iCRITICAL OMIT_TABLE 70 16 6 BI CPU_CFG<0> i U0500 TP_MCP_RSVD_AV63 HASWELL-ULT TP_MCP_RSVD_AU63 2C+GT2 TP_MCP_RSVD_C63 BGA-TSP SYM 19 OF 19 CFG0 (IPU) RESERVED 70 16 6 BI CPU_CFG<1> AC62 CFG1 (IPU) 70 16 BI CPU_CFG<2> AC63 CFG2 (IPU) 70 16 BI CPU_CFG<3> h AA63 CFG3 (IPU) 70 16 6 BI CPU_CFG<4> AA60 CFG4 (IPU) RSVD_TP C62 TP_MCP_RSVD_C62 70 16 BI CPU_CFG<5> Y62 CFG5 (IPU) 70 16 BI CPU_CFG<6> Y61 CFG6 (IPU) EDP_SPARE B43 NC Y60 CFG7 (IPU) 70 16 BI . cCPU_CFG<7> 70 16 6 BI CPU_CFG<8> V62 CFG8 (IPU) RSVD_TP A51 TP_MCP_RSVD_A51 70 16 6 BI CPU_CFG<9> 70 16 6 BI CPU_CFG<10> V61 CFG9 (IPU) RSVD_TP B51 TP_MCP_RSVD_B51 B BI CPU_CFG<11> 70 16 BI CPU_CFG<12> V60 CFG10 (IPU) 70 16 BI CPU_CFG<13> 70 16 BI CPU_CFG<14> U60 CFG11 (IPU) RSVD_TP L60 TP_MCP_RSVD_L60 70 16 T63 CFG12 (IPU) T62 CFG13 (IPU) RSVD N60 NC T61 CFG14 (IPU) w70 16 BI CPU_CFG<15> T60 CFG15 (IPU) RSVD W23 NC 70 16 BI RSVD Y22 NC CFG<10>:SAFE MODE BOOT 1 = NORMAL OPERATION 0 = POWER FEATURES NOT ACTIVE 70 16 BI CPU_CFG<16> AA62 CFG16 (IPU) 70 CPU_OPI_RCOMP CFG<9> :NO SVID-CAPABLE VR 1 = VR SUPPORTS SVID 0 = VR DOES NOT SUPPORT SVID 70 16 BI CPU_CFG<18> U63 CFG18 (IPU) PROC_OPI_COMP AY15 CFG<8> :ALLOW NOA ON LOCKED UNITS 1 = NORMAL OPERATION 0 = NOA ALWAYS UNLOCKED 70 16 BI CPU_CFG<17> CFG17 (IPU) CFG<4> :eDP ENABLE/DISABLE 1 = DISABLED 0 = ENABLED CPU_CFG<19> AA61 CFG19 (IPU) RSVD AV62 NC CFG<1> :PCH-LESS MODE 1 = NORMAL OPERATION 0 = PCH-LESS MODE U62 RSVD D58 NC CFG<0> :RESET SEQUENCE STALL 1 = NORMAL OPERATION 0 = STALL AFTER PCU PLL LOCK CPU_CFG_RCOMP w V63 CFG_RCOMP VSS P22 1 R0690 VSS N21 These can be placed close to J1800 NC A5 RSVD 49.9 and are only for debug access 1% 1/20W MF 2 201 NC E1 RSVD CPU_CFG<10> w NC D1 RSVD CPU_CFG<9> CPU_CFG<8> 6 16 70 NC J20 RSVD CPU_CFG<1> 6 16 70 CPU_CFG<0> 6 16 70 NC H18 RSVD RSVD P20 NC 6 16 70 RSVD R20 NC NOSTUFF 6 16 70 PCH_TD_IREF B12 TD_IREF NOSTUFF HSW_PRE_ES2 NOSTUFF NOSTUFF 1 R0630 R0680 1 1 R0685 R0640 1 1 R0639 R0638 1 1 R0631 1K 49.9 8.25K 1K 1K 1K 1K 1% 1% 1/20W 1/20W MF MF 5% 5% 5% 5% 5% 201 2 2 201 1/20W 1/20W 1/20W 1/20W 1/20W MF MF MF MF